PTN3392 데이터 시트보기 (PDF) - NXP Semiconductors.
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PTN3392 Datasheet PDF : 32 Pages
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NXP Semiconductors
6. Pinning information
6.1 Pinning
PTN3392
2-lane DisplayPort to VGA adapter IC
terminal 1
index area
RESET_N 1
CLK_O 2
HPD 3
VDDA_DP 4
TCK 5
TDO 6
GND_IO 7
TMS 8
TRST_N 9
TDI 10
SCL 11
VDD_IO 12
PTN3392BS
36 S3
35 S2
34 S1
33 S0
32 VDDD
31 VDDD
30 LDOCAP_CORE
29 GNDD
28 GNDD
27 OSC_OUT
26 OSC_IN
25 RED
002aae033
Transparent top view
Fig 2. Pin configuration for HVQFN48
6.2 Pin description
Table 3.
Symbol
VDDD
VDDA
Pin description
Pin
Type
32, 31 power
37
power
VDDA_DP
4
power
VDD_IO
VDD_DAC
GND_IO[1]
GND_DAC[1]
GNDA_DP0[1]
GNDA_DP1[1]
GNDA[1]
GNDD[1]
12
17, 18
7
23
45
48
41
28, 29
power
power
power
power
power
power
power
power
Description
digital core 3.3 V supply
analog AUX, bias and PLL 3.3 V supply
voltage
analog 3.3 V supply for DisplayPort receiver
module
I/O 3.3 V supply voltage
analog 3.3 V supply for DAC
I/O supply ground
analog ground for DAC
analog ground for DisplayPort Lane0
analog ground for DisplayPort Lane1
analog AUX, bias and PLL supply ground
digital core supply ground
PTN3392
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 5 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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