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MC44608P40 데이터 시트보기 (PDF) - Motorola => Freescale

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MC44608P40 Datasheet PDF : 16 Pages
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OSC
4V
Vcont
2.4 V
Clock
Figure 5.
MC44608
Figure 6. Hiccup Mode
V CC
13 V
10 V
6.5 V
DMG
Iprim
The OSC and Clock signals are provided according to the
figure 5. The Clock signals correspond to the CT capacitor
discharge. The bottom curve represents the current flowing
in the sense resistor Rcs. It starts from zero and stops when
the sawtooth value is equal to the control voltage Vcont. In
this way the SMPS is regulated with a voltage mode control.
Overvoltage Protection
The MC44608 offers two OVP functions:
– a fixed function that detects when VCC is higher than
15.4V
– a programmable function that uses the demag pin. The
current flowing into the demag pin is mirrored and compared
to the reference current Iovp (120µA). Thus this OVP is
quicker as it is not impacted by the VCC inertia and is called
QOVP.
In both cases, once an OVP condition is detected, the
output is latched off until a new circuit START–UP.
Start–up Management
The Vi pin 8 is directly connected to the HV DC rail Vin.
This high voltage current source is internally connected to the
VCC pin and thus is used to charge the VCC capacitor. The
VCC capacitor charge period corresponds to the Start–up
phase. When the VCC voltage reaches 13V, the high voltage
9mA current source is disabled and the device starts
working. The device enters into the switching phase.
It is to be noticed that the maximum rating of the Vi pin 8 is
700V. ESD protection circuitry is not currently added to this
pin due to size limitations and technology constraints.
Protection is limited by the drain–substrate junction in
avalanche breakdown. To help increase the application
safety against high voltage spike on that pin it is possible to
W insert a small wattage 1k series resistor between the Vin
rail and pin 8.
The figure 6 shows the VCC voltage evolution in case of no
external current source providing current into the VCC pin
during the switching phase. This case can be encountered in
SMPS when the self supply through an auxiliary winding is
not present (strong overload on the SMPS output for
example). The figure 16 also depicts this working
configuration.
Start–up
Phase
Latched off
Phase
Switching
Phase
In case of the hiccup mode, the duty cycle of the switching
phase is in the range of 10%.
Mode Transition
The LW latch figure 7 is the memory of the working status
at the end of every switching sequence.
Two different cases must be considered for the logic at the
termination of the SWITCHING PHASE:
1. No Over Current was observed
2. An Over Current was observed
These 2 cases are corresponding to the signal labelled
NOC in case of ”No Over Current” and ”OC” in case of Over
Current. So the effective working status at the end of the ON
time memorized in LW corresponds to Q=1 for no over
current and Q=0 for over current.
This sequence is repeated during the Switching phase.
Several events can occur:
1. SMPS switch OFF
2. SMPS output overload
3. Transition from Normal to Pulsed Mode
4. Transition from Pulsed Mode to Normal Mode
Figure 7. Transition Logic
Latched Off
Phase
VPWM
OUT
LEB out
1V
& NOC S Q
OC LW
&
SQ
Mode
Stand–by
&
R Q & R1
R2
+
–CS
m Start–up Idemag Switching Start–up
Phase > 24 A Phase Phase
S1
Switch
1. SMPS SWITCH OFF
When the mains is switched OFF, so long as the bulk
electrolithic bulk capacitor provides energy to the SMPS, the
controller remains in the switching phase. Then the peak
current reaches its maximum peak value, the switching
frequency decreases and all the secondary voltages are
reduced. The VCC voltage is also reduced. When VCC is
equal to 10V, the SMPS stops working.
MOTOROLA ANALOG IC DEVICE DATA
7

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