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DS3050W 데이터 시트보기 (PDF) - Maxim Integrated

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DS3050W Datasheet PDF : 18 Pages
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3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Detailed Description
The DS3050W is a 4Mb (512k x 8 bits) fully static, NV
memory similar in function and organization to the
DS1250W NV SRAM, but also containing an RTC and
rechargeable ML battery. The DS3050W NV SRAM con-
stantly monitors VCC for an out-of-tolerance condition.
When such a condition occurs, the lithium energy source
is automatically switched on and write protection is
unconditionally enabled to prevent data corruption. There
is no limit to the number of write cycles that can be exe-
cuted, and no additional support circuitry is required for
microprocessor interfacing. This device can be used in
place of SRAM, EEPROM, or flash components.
User access to either the SRAM or the real-time clock
registers is accomplished with a byte-wide interface
and discrete control inputs, allowing for a direct inter-
face to many 3.3V microprocessor devices.
The DS3050W RTC contains a full-function, year 2000-
compliant (Y2KC) clock/calendar with an RTC alarm,
watchdog timer, battery monitor, and power monitor.
RTC registers contain century, year, month, date, day,
hours, minutes, and seconds data in a 24-hour BCD
format. Corrections for day of the month and leap year
are made automatically.
The DS3050W RTC registers are double-buffered into
an internal and external set. The user has direct access
to the external set. Clock/calendar updates to the exter-
nal set of registers can be disabled and enabled to
allow the user to access static data. Assuming the
internal oscillator is on, the internal registers are contin-
ually updated, regardless of the state of the external
registers, assuring that accurate RTC information is
always maintained.
The DS3050W contains interrupt (IRQ/FT) and reset
(RST) outputs, which can be used to control CPU activ-
ity. The IRQ/FT interrupt output can be used to gener-
ate an external interrupt when the RTC register values
match user-programmed alarm values. The interrupt is
always available while the device is powered from the
system supply, and it can be programmed to occur
when in the battery-backed state to serve as a system
wake-up. The IRQ/FT output can also be used as a
CPU watchdog timer. CPU activity is monitored and an
interrupt can be activated if the correct activity is not
detected. The RST output can be used to detect a sys-
tem power-down or failure and hold the CPU in a safe
state until normal power returns.
The DS3050W constantly monitors the voltage of the
internal battery. The battery-low flag (BLF) in the RTC
FLAGS register is not writeable and should always be a
0 when read. Should a 1 ever be present, the battery
voltage is below 2V and the contents of the clock and
SRAM are questionable.
The DS3050W module is constructed on a standard 256-
ball, 27mm x 27mm BGA substrate. Unlike other sur-
face-mount NV memory modules that require the battery
to be removable for soldering, the internal ML battery
can tolerate exposure to convection reflow soldering
temperatures, allowing this single-piece component to
be handled with standard BGA assembly techniques.
Table 1. RTC/Memory Operational Truth Table
CS
WE
CE
OE
0
1
1
0
0
1
1
1
0
0
1
X
1
1
0
0
1
1
0
1
1
0
0
X
1
X
1
X
0
X
0
X
X = Don’t care. (1) = See Figure 4.
MODE
RTC Read
RTC Read
RTC Write
SRAM Read
SRAM Read
SRAM Write
Standby
Invalid (1)
ICC
Active
Active
Active
Active
Active
Active
Standby
Active
OUTPUTS
Active
High Impedance
High Impedance
Active
High Impedance
High Impedance
High Impedance
Invalid
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