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ALC5624-GR 데이터 시트보기 (PDF) - Realtek Semiconductor

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ALC5624-GR
Realtek
Realtek Semiconductor Realtek
ALC5624-GR Datasheet PDF : 78 Pages
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ALC5624
Datasheet
7. Functional Description
7.1. Power
The ALC5624 has many power blocks. SPKVDD operates between 2.3V and 5V. HPVDD, AVDD2, and
AVDD1 operate between 2.3V and 3.6V. DVDD1 and DVDD2 operate between 1.8V and 3.6V. The
power supply limit condition are DVDD1DVDD2, SPKVDDAVDD1=AVDD2, HPVDDAVDD1=
AVDD2DVDD2.
Power
Setting
DVDD1
3.3V
Table 5. Power Setting for Best Performance
DVDD2
HPVDD
AVDD2
1.8V
3.3V
3.3V
AVDD1
3.3V
SPKVDD
4.2V
7.2. Reset
There are 3 types of reset operation: Power-On Reset (POR), Cold, and Register reset.
Reset Type
POR
Cold Reset
Register Reset
Table 6. Reset Operation
Trigger Condition
CODEC Response
Monitor digital power supply voltage reach Reset all hardware logic and all registers to default
VPOR
values.
Assert RESET# for a specified period
Reset all hardware logic and all registers to default
values except some specify control registers and logic.
Write Reg-00h
Reset all registers to default values except some specify
control registers and logic.
7.2.1. Power-On Reset (POR)
When powered on, DVDD2 passes through the VPOR band of the ALC5624 (VPOR_ON ~VPOR_OFF). A
Power-On Reset (POR) will generate an internal reset signal (POR reset ‘LOW’) to reset the whole chip.
Table 7.
Symbol
Min
VPOR_ON
1.0
VPOR_OFF
-
Note: VPOR_OFF must be below VPOR_ON.
Power-On Reset Voltage
Typical
Max
-
1.6
1.3
-
Unit
V
V
Hand-Held Multimedia I2S Audio Codec
9
Track ID: JATR-1076-21 Rev. 1.3

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