MBM29DL64 데이터 시트보기 (PDF) - Fujitsu

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MBM29DL64

64 M (8 M ×8/4 M ×16) BIT FLASH MEMORY

Fujitsu 

s BLOCK DIAGRAM

VCC

VSS

A21 to A0

(A-1)

RESET

WE

CE

OE

BYTE

WP/ACC

DQ15 to DQ0

Bank A

address

Cell Matrix

8 Mbit

(Bank A)

X-Decoder

Bank B Address

State

Control

&

Command

Register

RY/BY

Status

Control

Bank C Address

Bank D

address

X-Decoder

Cell Matrix

8 Mbit

(Bank D)

MBM29DL64DF-70

Cell Matrix

24 Mbit

(Bank B)

X-Decoder

X-Decoder

Cell Matrix

24 Mbit

(Bank C)

DQ15

to

DQ0

s LOGIC SYMBOL

A-1

22

A21 to A0

16 or 8

DQ15 to DQ0

CE

OE

WE

RESET

BYTE

RY/BY

7

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