CY7C1360V25 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C1360V25 Datasheet PDF : 31 Pages
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PRELIMINARY
CY7C1360V25
CY7C1362V25
CY7C1364V25
Cycle Description[1, 2, 3]
Next Cycle Add. Used ZZ
Unselected
None
L
CE3 CE2 CE1 ADSP ADSC ADV OE
X
X
1
X
0
X
X
Unselected
None
L
1
X
0
0
X
X
X
Unselected
None
L
X
0
0
0
X
X
X
Unselected
None
L
1
X
0
1
0
X
X
Unselected
None
L
X
0
0
1
0
X
X
Begin Read
External
L
0
1
0
0
X
X
X
Begin Read
External
L
0
1
0
1
0
X
X
Continue Read Next
L
X
X
X
1
1
0
1
Continue Read Next
L
X
X
X
1
1
0
0
Continue Read Next
L
X
X
1
X
1
0
1
Continue Read Next
L
X
X
1
X
1
0
0
Suspend Read Current
L
X
X
X
1
1
1
1
Suspend Read Current
L
X
X
X
1
1
1
0
Suspend Read Current
L
X
X
1
X
1
1
1
Suspend Read Current
L
X
X
1
X
1
1
0
Begin Write
Current
L
X
X
X
1
1
1
X
Begin Write
Current
L
X
X
1
X
1
1
X
Begin Write
External
L
0
1
0
1
0
X
X
Continue Write Next
L
X
X
X
1
1
0
X
Continue Write Next
L
X
X
1
X
1
0
X
Suspend Write Current
L
X
X
X
1
1
1
X
Suspend Write Current
L
X
X
1
X
1
1
X
ZZ “sleep”
None
H
X
X
X
X
X
X
X
Note:
1. X = ”don't care,” 1 = HIGH, 0 = LOW.
2. Write is defined by BWE, BWx, and GW. See Write Cycle Description table.
3. The DQ pins are controlled by the current cycle and the OE signal. OE is asynchronous and is not sampled with the clock.
DQ
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
DQ
Hi-Z
DQ
Hi-Z
DQ
Hi-Z
DQ
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Write
X
X
X
X
X
X
Read
Read
Read
Read
Read
Read
Read
Read
Read
Write
Write
Write
Write
Write
Write
Write
X
10
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