EIC1212-8 데이터 시트보기 (PDF) - Excelics Semiconductor, Inc.
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EIC1212-8 Datasheet PDF : 1 Pages
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UPDATED 01/04/2006
EIC1212-8
12.20-12.70 GHz 8-Watt Internally Matched Power FET
FEATURES
• 12.20– 12.70GHz Bandwidth
• Input/Output Impedance Matched to 50 Ohms
• +39.0 dBm Output Power at 1dB Compression
• 6.5 dB Power Gain at 1dB Compression
• 27% Power Added Efficiency
• -46 dBc IM3 at PO = 28.5 dBm SCL
• Hermetic Metal Flange Package
• 100% Tested for DC, RF, and RTH
.827±.010 .669
Excelics
EIC1212-8
.120 MIN YYWW
SN
.024
.421
.120 MIN
.168±.010
.125
.508±.008
.442
ALL DIMENSIONS IN INCHES
.004
.063
.004
.105±.008
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
Caution! ESD sensitive device.
SYMBOL
P1dB
G1dB
∆G
PAE
Id1dB
IM3
IDSS
PARAMETERS/TEST CONDITIONS1
Output Power at 1dB Compression
f = 12.20-12.70GHz
VDS = 10 V, IDSQ ≈ 2200mA
Gain at 1dB Compression
VDS = 10 V, IDSQ ≈ 2200mA
Gain Flatness
f = 12.20-12.70GHz
f = 12.20-12.70GHz
VDS = 10 V, IDSQ ≈ 2200mA
Power Added Efficiency at 1dB Compression
VDS = 10 V, IDSQ ≈ 2200mA
f = 12.20-12.70GHz
Drain Current at 1dB Compression
f = 12.20-12.70GHz
Output 3rd Order Intermodulation Distortion
∆f = 10 MHz 2-Tone Test; Pout = 28.5 dBm S.C.L2
VDS = 10 V, IDSQ ≈ 65% IDSS
f = 12.70GHz
Saturated Drain Current
VDS = 3 V, VGS = 0 V
VP
Pinch-off Voltage
RTH
Thermal Resistance3
Note: 1) Tested with 100 Ohm gate resistor.
VDS = 3 V, IDS = 40 mA
2) S.C.L. = Single Carrier Level.
ABSOLUTE MAXIMUM RATING1,2
MIN
38.5
5.5
TYP
39.0
6.5
27
2300
MAX
±0.6
2600
UNITS
dBm
dB
dB
%
mA
-43
-46
dBc
4000
5000
mA
-2.5
-4.0
V
3.5
4.0
oC/W
3) Overall Rth depends on case mounting.
SYMBOL
CHARACTERISTIC
VALUE
VDS
Drain to Source Voltage
10 V
VGS
Gate to Source Voltage
-4.5 V
IDS
Drain Current
IDSS
IGSF
Forward Gate Current
80 mA
PIN
Input Power
@ 3dB compression
PT
Total Power Dissipation
38 W
TCH
Channel Temperature
175°C
TSTG
Storage Temperature
-65/+175°C
Notes:
1.
2.
Operating the device beyond any of the above ratings may result in permanent damage or reduction of MTTF.
Bias conditions must also satisfy the following equation PT < (TCH –TPKG)/RTH; where TPKG = temperature of package, and PT = (VDS * IDS) – (POUT – PIN).
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
page 1 of 1
Revised January 2006
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