PM25LD010 데이터 시트보기 (PDF) - Unspecified

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PM25LD010

512Kbit/1 Mbit / 2 Mbit Single Operating Voltage Serial Flash Memory With 100 MHz Dual-Output SPI Bus

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Pm25LD512/010/ 020

SYSTEM CONFIGURATION

The Pm25LD512/010/020 devices are designed to interface directly with the synchronous Serial Peripheral

Interface (SPI) of the Motorola MC68HCxx series of microcontrollers or any SPI interface-equipped system

controllers. The devices have two superset features that can be enabled through specific software instructions

and the Configuration Register:

Memory Density

512 Kbit

1 Mbit

Block No.

Block Size

(Kbytes)

Sector No.

Sector Size

(Kbytes)

Address Range

Sector 0(1)

4

000000h - 000FFFh

Sector 1

Block 0

32

:

4

001000h - 001FFFh

:

:

Sector 7

4

007000h - 007FFFh

Sector 8

4

008000h - 008FFFh

Sector 9

Block 1

32

:

4

009000h - 009FFFh

:

000000h - 006FFFh

Sector 15

4

00F000h - 00FFFFh

Block 2

32

"

"

010000h - 017FFFh

Block 3

32

"

"

018000h - 01FFFFh

Memory Density

2 Mbit

Block No.

Block

Size

(KBytes)

Block 0

64

Block 1

64

:

:

Block 3

64

Sector No.

Sector 0

Sector 1

:

Sector 15

Sector 16

Sector 17

:

Sector 31

:

:

Table 1-1. Block/Sector Addresses of Pm25LD512/010/020

Sector

Size

(KBytes)

4

4

:

4

4

4

:

4

:

4

Address Range

000000h - 000FFFh

001000h - 001FFFh

:

00F000h - 00FFFFh

010000h - 010FFFh

011000h - 011FFFh

:

01F000h - 01FFFFh

:

030000h – 03FFFFh

Confidential information

Chingis Technology Corp.

6

DRAFT Date: August, 2010, Rev:0.4

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