TC9329AFAG 데이터 시트보기 (PDF) - Toshiba
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TC9329AFAG Datasheet PDF : 83 Pages
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Description of Pin Function
TC9329AFAG/AFCG
Pin No. Symbol
Pin Name
Function and Operation
1 COM1/OT1
2 COM2/OT2
3 COM3/OT3
4 COM4/OT4
5~14
S1/OT5~
S10/OT14
P8-0/S13~
15~22
P9-3/S18
Outputs common signals to LCD
panels. Through a matrix with pins S1
to S18, a maximum of 72 segments can
be displayed.
LCD common
output/Output port
Three levels, VLCD, VEE (1/2 VLCD ),
and GND, are output at 62.5 Hz every 2
ms.
VEE is output after system reset and
CLOCK STOP are released, and a
common signal is output after the DISP
OFF bit is set to “0”.
These pins can be programmed as
output ports (Note 1).
LCD segment
output/Output port
Segment signal output terminals for
LCD panel. Together with COM1 to
COM4, a matrix is formed that can
display a maximum of 72 segments.
VEE is output after system reset and
CLOCK STOP are released, and a
common signal is output after the DISP
OFF bit is set to “0”.
All pins from S1 to S10 can be
programmed as output ports (Note 1),
and all pins from S11 to S18 as I/O
ports, in units of pins.
When the pins function as output ports,
VLCD pin potential and GND potential
are output to them. When the pins
function as I/O ports, drain output is
N-ch open. Because power is supplied
from VLCD for the I/O ports, up to VLCD
voltage (3 V) can be applied.
LCD segment
An instruction increments the data ports
output/ I/O port 8, 9 (OT1 to OT14) by 1 every time data are
accessed. Therefore the ports can be
used for external memory address
signals, facilitating data access.
Note: After system reset, the output
port pins are set to LCD output,
the I/O port pins to I/O port input.
Remarks
VLCD
VEE
VLCD
VLCD
Input
instruction
VDD
23~26 P1-0~P1-3 I/O port 1
The input and output of these 4-bit I/O
ports can be programmed in 1-bit units.
VDD
VDD
These pins can be programmed to be
pulled up or down. Thus, they can be
used as key input pins.
By altering the input of I/O ports set to
input, the CLOCK STOP mode or the
WAIT mode can be released, and the
MUTE bit of the MUTE pin can be set to
“1”.
RIN1
VDD
Note 1: When the LCD pin is set as an output port, the “H” level output is the doubled voltage VLCD. Therefore
disconnect the voltage boosting capacitor and connect the VLCD pin to the VDD pin.
4
2006-03-02
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