CXA2095 데이터 시트보기 (PDF) - Sony Semiconductor
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CXA2095 Datasheet PDF : 40 Pages
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CXA2095S
Pin
No.
Symbol
15 YS
16 RIN
17 GIN
18 BIN
19 RSH
21 GSH
23 BSH
20 ROUT
22 GOUT
24 BOUT
25 IKIN
26
ABLIN
/VCOMP
Equivalent circuit
147
15
40k
SVCC
100µ
SVCC
200
16
17
18
30k
SVCC
1k
19
21
23
50µ
Description
YS switch control input.
When YS is high, the RGB block signal is
selected; when YS is low, the Y/C block is
selected.
VILMAX = 0.4V
VIHMIN = 1.0V
VIHMAX = 3.0V
Analog R, G and B signal input.
Input a 0.7Vp-p (no sync, 100 IRE) signal via a
capacitor. The signal is clamped to 5.1V at the
burst timing of the signal input to the sync input
(Pin 44).
Sample-and-hold for R, G and B AKB.
Connect to GND via a capacitor. When not using
AKB (manual cut-off mode), R, G and B cut-off
voltage can be controlled by applying a control
voltage to each pin. The control voltage is 4.2 ±
2V.
SVCC
200
12k
20
1100µ
R, G and B signal output.
2.4Vp-p is output during 100% white input.
Input the signal converted from the CRT beam
current (cathode current IK) to a voltage via a
SVCC
capacitor. The V blanking part is clamped to 2.7V at
1k
the V retrace timing.
The input for this pin is the reference pulse return,
25
and the loop operates so that the Rch, the Gch and
Bch are all 1Vp-p. (∗For the CXA2025S, the loop
50µ
operates so that the Rch is 1Vp-p and the Gch and
Bch are 0.83Vp-p.) The Gch and Bch can be varied
by ±0.5V by the bus CUTOFF control. When not
using AKB, this pin should not be connected.
SVCC
147
26
ABL control signal input and VSAW high voltage
fluctuation compensation signal input.
High voltage compensation has linear control
characteristics for the pin voltage range of about
8V to 1V.
ABL operates when the pin voltage becomes
lower than about 1.2V.
–5–
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