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HT82K68A-28 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT82K68A-28
Holtek
Holtek Semiconductor Holtek
HT82K68A-28 Datasheet PDF : 39 Pages
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S y s te m C lo c k /4
TM 1
TM 0
T im e r C o u n te r
P r e lo a d R e g is te r
D a ta B u s
R e lo a d
HT82K68A
TM 1
TM 0
TO N
P u ls e W id th
M e a s u re m e n t
M o d e C o n tro l
T im e r
C o u n te r
Timer Counter
O v e r flo w
to In te rru p t
To enable the counting operation, the timer ON bit
(TON; bit 4 of TMRC) should be set to 1. In the case of
timer counter OFF condition, writing data to the timer
counter preload register will also reload that data to the
timer counter. But if the timer counter is turned on,
data written to it will only be kept in the timer counter
preload register. The timer counter will still operate until
overflow occurs. When the timer counter (reading TMR) is
read, the clock will be blocked to avoid errors. As clock
blocking may results in a counting error, this must be taken
into consideration by the programmer.
The state of the registers is summarized in the following table:
Register
TMR
TMRC
Program
Counter
MP0
MP1
ACC
TBLP
TBLH
STATUS
INTC
WDTS
PA
PAC
PB
PBC
PC
PCC
PD
PDC
PE
PEC
Reset
(Power On)
xxxx xxxx
00-0 1---
000H
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
-xxx xxxx
--00 xxxx
-000 0000
0000 0111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
---1 1111
---1 1111
WDT Time-out
RESET Reset
(Normal Operation) (Normal Operation)
uuuu uuuu
uuuu uuuu
00-0 1---
00-0 1---
000H
000H
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
--1u uuuu
-000 0000
0000 0111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
---1 1111
---1 1111
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
--uu uuuu
-000 0000
0000 0111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
---1 1111
---1 1111
Note: ²*² stands for ²warm reset²
²u² stands for ²unchanged²
²x² stands for ²unknown²
RESET Reset
(HALT)
uuuu uuuu
00-0 1---
000H
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
--01 uuuu
-000 0000
0000 0111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
---1 1111
---1 1111
WDT Time-out
(HALT)
uuuu uuuu
uu-u u---
000H*
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
--11 uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
---u uuuu
Rev. 1.70
13
December 26, 2005

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