QL6250-E 데이터 시트보기 (PDF) - QuickLogic Corporation

부품명

상세내역

제조사

QL6250-E

FPGA Combining Performance, Density, and Embedded RAM

QuickLogic Corporation 

4/( (FOLSVH( 'DWD 6KHHW

‡ ‡ ‡ ‡ ‡ ‡ )3*$ &RPELQLQJ 3HUIRUPDQFH 'HQVLW\ DQG (PEHGGHG 5$0

'HYLFH +LJKOLJKWV

)OH[LEOH 3URJUDPPDEOH /RJLF

‡ 0.18 µm six layer metal CMOS Process

‡ 1.8/2.5/3.3 V Drive Capable I/O

‡ 960 Logic Cells

‡ 248,160 Max System Gates

‡ Up to 250 I/O Pins

(PEHGGHG 'XDO 3RUW 65$0

‡ Twenty 2,304-bit Dual Port High

Performance SRAM Blocks

‡ 46,100 RAM bits

‡ RAM/ROM/FIFO Wizard for Automatic

Configuration

‡ Configurable and Cascadable

3URJUDPPDEOH ,2

‡ High performance Enhanced I/O (EIO)—

less than 3 ns Tco

‡ Programmable Slew Rate Control

‡ Programmable I/O Standards:

‡ LVTTL, LVCMOS, PCI, GTL+, SSTL2,

and SSTL3

‡ Eight Independent I/O Banks

‡ Three Register Configurations: Input,

Output, and Output Enable

$GYDQFHG &ORFN 1HWZRUN

‡ Nine Global Clock Networks:

‡ One Dedicated

‡ Eight Programmable

‡ 20 Quad-Net Networks—five per Quadrant

‡ 16 I/O Controls—two per I/O Bank

‡ Four phase locked loops

(PEHGGHG &RPSXWDWLRQDO 8QLWV

10 ECUs provide integrated Multiply, Add, and

Accumulate Functions.

PLL

Embedded RAM Blocks

PLL

10 Embeded Computational Units

Fabric

PLL

Embedded RAM Blocks

PLL

)LJXUH  4/( (FOLSVH( %ORFN

'LDJUDP

‹  4XLFN/RJLF &RUSRUDWLRQ

Preliminary

ZZZTXLFNORJLFFRP ‡‡‡‡‡‡



Share Link: