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AS5050-EQFT 데이터 시트보기 (PDF) - austriamicrosystems AG

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AS5050-EQFT
AMSCO
austriamicrosystems AG AMSCO
AS5050-EQFT Datasheet PDF : 22 Pages
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AS5050
Datasheet - Detailed Description
Figure 4. Interrupt Chaining
XENINT
=1 0
&1
INT
mode
XINT
XENINT
=1 0
&1
INT
mode
XINT
XINT
AS5050 (Device A)
AS5050 (Device B)
Micro
controller
7.2 SPI Communication
The transmitted data consists of 14-bit data, an Error-Flag and a Parity bit. When writing data to the chip, the Error-Flag is not applicable. The
Parity is generated from the upper 15-bit and forms an even parity over the whole frame. The Error-Flag indicates that a failure occurred in a
previous transmission.
7.2.1 Command Package
Every command sent to the AS5050 is represented with the following layout.
Table 6. Command Package
Bit MSB 14 13 12 11 10
9
8
7
6
5
4
3
2
1 LSB
RWn
Address <13:0>
PAR
Bit
RWn
Address
PAR
Description
Indicates read or write command
14-bit address code
Parity bit (EVEN)
7.2.2 Read Package (Value Read from AS5050)
The read frame always contains two alarm bits, the error and parity flags and the addressed data of the previous read command.
Table 7. Read Package
Bit MSB 14 13 12 11 10
9
8
7
6
5
4
3
2
1 LSB
Data <13:0>
EF PAR
Bit
Description
Data
14-bit addressed data
EF
Error flag indicating a transmission error in a previous host
transmission
PAR
Parity bit (EVEN)
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