QL4016-0CF208M 데이터 시트보기 (PDF) - Unspecified
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QL4016-0CF208M Datasheet PDF : 35 Pages
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Military QuickRAM Family Data Sheet Rev. C
Table 14: I/O Cell Input Delays
Symbol
Parameter
Propagation Delays (ns) Fanouta
1
2
3
4
8 10
tI/O
tISU
tIH
tIOCLK
tIORST
tIESU
tIEH
Input Delay (bidirectional pad)
Input Register Set-Up Time
Input Register Hold Time
Input Register Clock to Q
Input Register Reset Delay
Input Register Clock Enable Set-Up Time
Input Register Clock Enable Hold Time
1.3 1.6 1.8 2.1 3.1 3.6
3.1 3.1 3.1 3.1 3.1 3.1
0.0 0.0 0.0 0.0 0.0 0.0
0.7 1.0 1.2 1.5 2.5 3.0
0.6 0.9 1.1 1.4 2.4 2.9
2.3 2.3 2.3 2.3 2.3 2.3
0.0 0.0 0.0 0.0 0.0 0.0
a. Stated timing for worst case Propagation Delay over process variation at VCC = 3.3 V and TA = 25°C. Multiply by the appropriate
Delay Factor, K, for speed grade, voltage and temperature settings as specified in Table 4.
Table 15: I/O Cell Output Delays
Symbol
tOUTLH
tOUTHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
Output Delay Low to High
Output Delay High to Low
Output Delay Tri-state to High
Output Delay Tri-state to Low
Output Delay High to Tri-statea
Output Delay High to Tri-statea
Propagation Delays (ns)
Output Load Capacitance (pF)
3
50
75
100
150
2.1
2.5
3.1
3.6
4.7
2.2
2.6
3.2
3.7
4.8
1.2
1.7
2.2
2.8
3.9
1.6
2.0
2.6
3.1
4.2
2.0
-
-
-
-
1.2
-
-
-
-
a. The loads presented in Figure 5 are used for tPXZ:
1K Ω
Figure 5: Loads used for tPXZ
t PHZ
5 pF
1K Ω
tPLZ
5 pF
© 2007 QuickLogic Corporation
www.quicklogic.com
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