IP2001PBF 데이터 시트보기 (PDF) - International Rectifier

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IP2001PBF

Synchronous Buck Multiphase Optimized BGA Power Block

International Rectifier 

iP2001PbF

Pin Description Table

Pin Name

Ball Designator

Pin Function

VDD

A1 – A3, B1 – B3

Supply voltage for the internal circuitry.

VIN

A5 – A12, B5 – B12,

C5 - C10

Input voltage for the DC-DC converter.

C11, C12, D11, D12, E11,

PGND

E12, F6, F7, F12, G6, G7,

G12, H6, H7,

H12,

J6, J7, J12,

Power Ground - connection to the ground of

bulk and filter capacitors.

K5 – K7, K12, L5, L6, L12,

M5 – M7, M12

D5 – D10, E5 – E10,

F8 – F11, G8 – G11,

VSW

H8 – H11, J8 – J11,

Switching Node - connection to the output

inductor.

K8 – K11, L8 – L11,

M8 – M11

SGND

ENABLE

C1 – C3, D1 –D3, E1 –E3

F1

Signal Ground.

When set to logic level high, internal

circuitry of the device is enabled. When set

to logic level low, the PRDY pin is forced

low, the Control and Sychronous switches are

turned off, and the supply current is less than

10µA.

PRDY

Power Ready - This pin indicates the status of

ENABLE or VDD. This output will be driven

low when ENABLE is logic low or when VDD

K1

is less than 4.4V (typ.). When ENABLE is

logic high and VDD is greater than 4.4V

(typ.), this output is driven high. This output

has a 10mA source and 1mA sink capability.

PWM

NC

H1

TTL-level input signal to MOSFET drivers.

B4, C4, D4, E4, F2 – F4, G2 –

G4, H2 – H4, J1, J2 – J4, K3,

This pin is not for electrical connection. It

should be attached only to dead copper.

L1, L2, M1 – M4

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