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HD49343NP 데이터 시트보기 (PDF) - Renesas Electronics

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HD49343NP
Renesas
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HD49343NP Datasheet PDF : 23 Pages
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Preliminary Datasheet
HD49343NP/HNP
CDS/PGA & 12-bit A/D Converter
R19DS0068EJ0200
Rev.2.00
Jul 06, 2012
Description
The HD49343NP/HNP is a CMOS IC that provides CDS-PGA analog processing (CDS/PGA) suitable for CCD camera
digital signal processing systems together with a 12-bit A/D converter in a single chip.
Functions
Correlated double sampling
PGA
Serial interface control
12-bit ADC
Operates using only the 3 V, ADC output
Corresponds to switching mode of power dissipation and operating frequency
HD49343HNP : 200 mW, f_max: 36 MHz
HD49343NP : 120 mW, f_max: 25 MHz
QFN 36-pin package
Features
Suppresses the CCD reset noise by the correlated double sampling.
High sensitivity can be achieved by 10 bit gray scale provided by PGA which can be set to –6 to 34 dB.
PGA gain, S/H frequency response, pulse timing, etc., is achieved via a serial interface.
High precision is provided by a 12-bit resolution A/D converter.
Difference encoded gray code can be selected as an A/D output code. It is effective in suppression of solarization
(wave pattern). It is patented by Renesas.
Block Diagram
ADC_in
CDS_in
FBC
SHC
ADCLK
SP1
SP2
CDS
Timing
generator
PGA
12bit
ADC
Clamp
Differential 12
code
D0 to D11
PBLK
OBP
V_ref
Bias
Serial
comm
CS
Sdata
SCK
R19DS0068EJ0200 Rev.2.00
Jul 06, 2012
Page 1 of 22

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