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MBM29LV017-90 데이터 시트보기 (PDF) - Fujitsu
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MBM29LV017-90
CMOS 16M (2M × 8) BIT
Fujitsu
MBM29LV017-90 Datasheet PDF : 52 Pages
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PRODUCT LINE UP
Part No.
Ordering Part No.
V
CC
=
3.3
V
+0.3 V
–0.3 V
V
CC
=
3.0
V
+0.6 V
–0.3 V
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
s
BLOCK DIAGRAM
MBM29LV017
-80/-90/-12
MBM29LV017
-80
—
—
—
-90
-12
80
90
120
80
90
120
30
35
50
V
CC
V
SS
WE
RESET
CE
OE
RY/BY
Buffer
RY/BY
Erase Voltage
Generator
DQ
0
to DQ
7
Input/Output
Buffers
State
Control
Command
Register
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Data Latch
A
0
to A
20
STB
Y-Decoder
Low V
CC
Detector
Timer for
Program/Erase
Address
Latch
X-Decoder
Y-Gating
Cell Matrix
5
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