ST72C314N4 데이터 시트보기 (PDF) - STMicroelectronics

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ST72C314N4

8-bit MCU for automotive with single voltage Flash/ROM memory, ADC, 16-bit timers, SPI, SCI interfaces

STMicroelectronics 

ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto

2 INTRODUCTION

The ST72334J/N-Auto, ST72314J/N-Auto and

ST72124J-Auto devices are members of the ST7

microcontroller family. They can be grouped as fol-

lows:

– ST72334J/N-Auto devices are designed for mid-

range applications with Data EEPROM, ADC,

SPI and SCI interface capabilities.

– ST72314J/N-Auto devices target the same

range of applications but without Data EEPROM.

– ST72124J-Auto devices are for applications that

do not need Data EEPROM and the ADC periph-

eral.

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

tion set.

The ST72C334J/N-Auto, ST72C314J/N-Auto and

ST72C124J-Auto versions feature single-voltage

Flash memory with byte-by-byte In-Situ Program-

ming (ISP) capability.

Under software control, all devices can be placed

in Wait, Slow, Active Halt or Halt mode, reducing

power consumption when the application is in idle

or standby state.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact application code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication and indirect addressing

modes.

For easy reference, all parametric data is located

in Section 15 on page 108.

Figure 1. General Block Diagram

RESET

ISPSEL

VDD

VSS

OSC1

OSC2

PF7,6,4,2:0

(6-bit)

PE7:0

(6-bit for N versions)

(2-bit for J versions)

8-bit CORE

ALU

CONTROL

LVD

MULTI-OSC

+

CLOCK FILTER

MCC/RTC

PORT F

TIMER A

BEEP

PORT E

SCI

WATCHDOG

PROGRAM

MEMORY

(8 or 16 Kbytes)

RAM

(384 or 512 bytes)

EEPROM

(256 bytes)

PORT A

PORT B

PORT C

TIMER B

SPI

PORT D

8-bit ADC

PA7:0

(8-bit for N versions)

(5-bit for J versions)

PB7:0

(8-bit for N versions)

(5-bit for J versions)

PC7:0

(8-bit)

PD7:0

(8-bit for N versions)

(6-bit for J versions)

VDDA

VSSA

8/150

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