ST72324BLJ2B1 데이터 시트보기 (PDF) - STMicroelectronics
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ST72324BLJ2B1
STMicroelectronics
ST72324BLJ2B1 Datasheet PDF : 154 Pages
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ST72324Lxx
Pin n°
Pin Name
Level
Port
Input
Output
Main
function
(after
reset)
Alternate Function
27 25 10 13 PC2 (HS)/ICAP2_B I/O CT HS X X
28 26 11 14 PC3 (HS)/ICAP1_B I/O CT HS X X
29 27 12 15
PC4/MISO/ICCDA-
TA
I/O CT
XX
X X Port C2 Timer B Input Capture 2
X X Port C3 Timer B Input Capture 1
X
X
SPI Master
Port C4 In / Slave
Out Data
ICC Data In-
put
30 28 13 16 PC5/MOSI/AIN14 I/O CT
XX
X
X
X
SPI Master
Port C5 Out / Slave
In Data
ADC Analog
Input 14
31 29 14 17 PC6/SCK/ICCCLK I/O CT
XX
X
X
Port C6
SPI Serial
Clock
ICC Clock
Output
32 30 15 18 PC7/SS/AIN15
I/O CT
XX
X
X
SPI Slave
X Port C7 Select (ac-
tive low)
ADC Analog
Input 15
34 31 16 19 PA3 (HS)
35 32
VDD_1
36 33
VSS_1
37 34 17 20 PA4 (HS)
38 35
PA5 (HS)
39 36 18 21 PA6 (HS)
40 37 19 22 PA7 (HS)
41 38 20 23 VPP /ICCSEL
I/O CT HS X
ei0
S
S
I/O CT HS X X
I/O CT HS X X
I/O CT HS X
I/O CT HS X
I
X X Port A3
Digital Main Supply Voltage5)
Digital Ground Voltage5)
X X Port A4
X X Port A5
T
Port A6 1)
T
Port A7 1)
Must be tied low. In the flash pro-
gramming mode, this pin acts as the
programming voltage input VPP. See
Section 12.9.2 for more details. High
voltage must not be applied to ROM
devices.
42 39 21 24 RESET
43 40 22 25 VSS_2
44 41 23 26 OSC2
I/O CT
S
O
Top priority non maskable interrupt.
Digital Ground Voltage5)
Resonator oscillator inverter output
45 42 24 27 OSC1
46 43 25 28 VDD_2
47 44 26 29 PE0/TDO
48 1 27 30 PE1/RDI
3 2 28 31 PB0
43
PB1
54
PB2
6 5 29 32 PB3
I
S
I/O CT
I/O CT
I/O CT
I/O CT
I/O CT
I/O CT
XX
XX
X ei2
X ei2
X ei2
X
ei2
External clock input or Resonator os-
cillator inverter input
Digital Main Supply Voltage5)
X X Port E0 SCI Transmit Data Out
X X Port E1 SCI Receive Data In
X X Port B0
X X Port B1
X X Port B2
X X Port B3
Notes:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,
else the configuration is floating interrupt input.
2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD
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