100341 데이터 시트보기 (PDF) - Fairchild Semiconductor

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100341

Low Power 8-Bit Shift Register

Fairchild Semiconductor 

Test Circuitry

Note:

• VCC, VCCA = +2V, VEE = −2.5V

• L1, L2 and L3 = equal length 50Ω impedance lines

• RT = 50Ω terminator internal to scope

• Decoupling 0.1 µF from GND to VCCand VEE

• All unused outputs are loaded with 50Ω to GND

• CL = Fixture and stray capacitance ≤ 3 pF

FIGURE 1. AC Test Circuit

Note:

• For shift right mode pulse generator connected to S0 is moved to S1.

• Pulse generator connected to S1 has a LOW frequency 99% duty cycle, which allows occasional parallel load.

• The feedback path from output to input should be as short as possible.

FIGURE 2. Shift Frequency Test Circuit (Shift Left)

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