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88ALP01 데이터 시트보기 (PDF) - Marvell Semiconductor

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88ALP01
Marvell
Marvell Semiconductor Marvell
88ALP01 Datasheet PDF : 160 Pages
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88ALP01
Datasheet
Table 71: Global Control Register Map ............................................................................................................81
3.4
NAND Flash Unit .............................................................................................................................................90
Table 86: NAND Flash Unit Registers ..............................................................................................................90
3.5
SDIO Host Controller Registers ....................................................................................................................101
Table 114: SDIO Host Controller Register Map................................................................................................101
3.6
CMOS Camera Interface Controller ..............................................................................................................124
Table 159: CMOS Camera Interface Controller Register Map .........................................................................124
4 Mechanical Drawings .....................................................................................................................140
5 Electrical Specifications ................................................................................................................141
5.1
Absolute Maximum Ratings ..........................................................................................................................141
Table 183: Absolute Maximum Ratings ............................................................................................................141
5.2
Recommended Operating Conditions ...........................................................................................................141
Table 184: Recommended Operating Conditions.............................................................................................141
5.3
Package Thermal Conditions ........................................................................................................................142
Table 185: 14 x 14 mm TQFP Package ...........................................................................................................142
5.4
DC Electrical Characteristics.........................................................................................................................142
Table 186: Current Consumption AVDD_PLL ..................................................................................................142
Table 187: Current Consumption VDD .............................................................................................................143
Table 188: Current Consumption VDDO ..........................................................................................................143
Table 189: Current Consumption VDDOC........................................................................................................143
5.5
Input Clock Specifications .............................................................................................................................143
Table 190: 24 MHz Reference Clock Timing ....................................................................................................143
5.6
Internal Resistors ..........................................................................................................................................144
Table 191: Internal Resistors ............................................................................................................................144
5.7
PCI Bus Interface Unit...................................................................................................................................144
Table 192: PCI Bus Interface Unit DC Specifications .......................................................................................144
Table 193: PCI Bus Interface Unit AC Specifications .......................................................................................145
Table 194: 66 and 33 MHz PCI Timing.............................................................................................................145
5.8
NAND Flash Controller..................................................................................................................................146
Table 195: NAND Flash DC Specifications ......................................................................................................146
Table 196: NAND Flash Timing ........................................................................................................................148
5.9
SDIO .............................................................................................................................................................149
Table 197: SDIO DC Specifications..................................................................................................................149
Table 198: SDIO Low Speed Timing ................................................................................................................150
Table 199: SDIO High Speed Timing ...............................................................................................................151
5.10 CMOS Camera Interface...............................................................................................................................152
Table 200: CMOS Camera Interface DC Specifications ...................................................................................152
Table 201: CMOS Camera Timing ...................................................................................................................153
5.11 JTAG Test Interface ......................................................................................................................................153
Table 202: JTAG Test Interface DC Specifications for 3.3V Signaling .............................................................153
Table 203: JTAG Timing ...................................................................................................................................154
5.12 GPIO .............................................................................................................................................................155
Doc. No. MV-S103921-00 Rev. –
Page 10
Document Classification: Proprietary Information
Copyright © 2007 Marvell
July 17, 2007, Preliminary

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