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THC63LVD103D 데이터 시트보기 (PDF) - THine Electronics, Inc.

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THC63LVD103D
THINE
THine Electronics, Inc. THINE
THC63LVD103D Datasheet PDF : 12 Pages
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THC63LVD103D _Rev.3.0_E
THC63LVD103D
160MHz 30Bits COLOR LVDS Transmitter
General Description
The THC63LVD103D transmitter is designed to sup-
port pixel data transmission between Host and Flat
Panel Display from NTSC up to 1080p(60Hz).
The THC63LVD103D converts 35bits of CMOS/TTL
data into LVDS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for ris-
ing edge or falling edge clocks through a dedicated pin.
At a transmit clock frequency of 160MHz, 30bits of
RGB data and 5bits of timing and control data
(HSYNC, VSYNC, DE, CNTL1, CNTL2) are transmit-
ted at an effective rate of 1.12Gbps per LVDS channel.
Features
Wide dot clock range: 8-160MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SXGA+ and 1080p
PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
64pin TQFP
Pin compatible with THC63LVD103(30bits)
Block Diagram
CMOS/TTL INPUT
7
TA0-6
7
TB0-6
7
TC0-6
7
TD0-6
TE0-6 7
CLK IN
PLL
(8 to160MHz)
RS
R/F
/PDWN
LVDS OUTPUT
TA +/-
TB +/-
TC +/-
TD +/-
TE +/-
TCLK +/-
(8 to 160MHz)
Copyright©2011 THine Electronics, Inc.
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THine Electronics, Inc.

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