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FAN100 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FAN100
Fairchild
Fairchild Semiconductor Fairchild
FAN100 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Marking Information
DZXXYYTTTT
FAN100
TPM
F- Fairchild logo
Z- Plant Code
X- 1 digit year code
Y- 1 digit week code
TT: 2 digits die run code
T: Package type (M=SOP)
P: Z: Pb free, Y: Green package
M: Manufacture flow code
Pin Configuration
Figure 4. Top Mark
CS
GND
COMI
COMV
GATE
VDD
GND
VS
Figure 5. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
CS
GND
COMI
COMV
VS
GND
VDD
GATE
Description
Analog input, current sense. Connected to a current-sense resistor for peak-current-mode
control in CV mode. The current-sense signal is also provided for output-current regulation in
CC mode.
Voltage reference, ground.
Analog output, current compensation. Output of the current error amplifier. Connect a capacitor
between COMI pin and GND for frequency compensation.
Analog output, voltage compensation. Output of the voltage error amplifier. Connect a capacitor
between COMV pin and GND for frequency compensation.
Analog input, voltage sense. Output-voltage-sense input for output-voltage regulation.
Voltage reference, ground.
Supply, power supply.
Driver output. The totem-pole output driver to drive the power MOSFET.
© 2008 Fairchild Semiconductor Corporation
FAN100 Rev. 1.0.0
3
www.fairchildsemi.com

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