FH8065403552500SR3GQ 데이터 시트보기 (PDF) - Intel

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FH8065403552500SR3GQ

Intel® Atom™ Processor C2000Product Family for Microserver

Intel 

Revision History—C2000 Product Family

Revision History

Date

January 2016

September 2014

January 2014

Revision Description

003US

The following technical changes were made in Datasheet 003US:

• Table 1-2 - Added “Lowest Frequency Mode” row to table and removed “Reliability/

Availability” row from table.

• Table 1-4 - Added CPPM to terminology.

• Section 3.3.1 and Section 3.3.2 - Corrected minimum memory capacity. and device density.

• Table 3-1 and Table 3-2 - Added row for 1 GB.

• Section 3.4.2 - Added Paragraph.

• Section 4.4 - Updated section.

• Table 5-2 - Updated signals.

• Section 7 - Added note to SoC Reset and Power Supply Sequences.

• Section 7.1.3 - Changed sequence shown in V1P0A voltage is provided to all V1P0A voltage-

group pins the of SoC.

• Section 7.2.1 - Updated Cold Reset Sequence.

• Section 12.3.6 - Added note.

• Section 15.4.7.1 and Section 15.4.8.1- Updated.

• Table 22-3 - Updated entries in Content column.

• Section 22.7 - Added note.

• Table 23-2 - Updated descriptions.

• Table 25-1 - Updated and clarified reserved bits in Section 25.3.1.

• Figure 31-1 and Table 31-14 - Updated signal names.

• Table 31-15 - Updated RTC Well Signals.

• Table 31-17 - Updated Description of PMU_RESETBUTTON_B/GPIOS_30.

• Table 31-24 - Updated entries in “Internal Pull-up or Pull-down” column.

• Table 31-25 - Updated entries in “Internal Pull-up or Pull-down” column.

• Table 31-25 - Added footnote to SPI_CS0_B.

• Table 33-2 and Table 33-3 - Updated signal name of TDQS_CK.

• Table 33-42 - Updated RTC Crystal Requirements.

• Figure 33-10 - Figure updated.

002US

1.0

The following technical changes were made in Datasheet 002US:

• Updated Revision numbering scheme for public release from 1.1 to 002US.

• Global Change - IRERR changed to IERR throughout the manual.

• Global Change - SMBALERT# changed to SMBALRT_N throughout the manual.

• Table 1-2 - Added CUNIT_REG_DEVICEID[31:0] row.

• Section 3.3.3 - Added System Memory Technology which is Not Supported.

• Table 3-2 - Added Table note.

• Section 7.2.1 - Updated V1P35S note.

• Section 9.3 - Updated PCI Express.

• Section 11.5.2.1 - Added paragraph.

• Table 12-2 - Updated Description for FLEX_CLK_SE1.

• Section 12.2 - Updated supported features.

• Section 12.3.3.2 - Updated ASPM and ASPM Optionality.

• Section 12.6 - Updated Power Management.

• Table 12-9 - Added x4 Lanes with 4 Controllers SKUs.

• Previous Section 16.5.2 - Deleted section.

• Table 16-1 - Changed Strap Usage for FLEX_CLK_SE1.

• Table 16-5 - Updated Description for Bits 1 and 0.

• Table 17-4 - Added Table Note 1 to Slave Address (Data Phase).

• Table 31-6 - Updated Description for THERMTRIP_N.

• Table 31-24 - Changed FLEX_CLK_SE1 pin 0 to Reserved.

• Section 33.16.4 - Changed PPM Tolerance to 35 ppm.

• Table 33-45 - Changed TRISE/FALL Min and Max Rise/Fall Time Max from 5ns to 3ns.

Initial Release.

January 2016

Order Number: 330061-003US

Intel® Atom™ Processor C2000 Product Family for Microserver

Datasheet

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