LH5164AZ8 데이터 시트보기 (PDF) - Sharp Electronics
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LH5164AZ8 Datasheet PDF : 9 Pages
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LH5164AZ8
CMOS 64K (8K × 8) Static RAM
CE1 CONTROL (NOTE)
VCC
2.5 V
VCC - 0.2 V
VCCDR
CE1
0V
tCDR
DATA HOLD MODE
tRDR
CE1 ≥ VCCDR - 0.2 V
CE2 CONTROL
VCC
CE2
2.5 V
tCDR
DATA HOLD MODE
tRDR
VCCDR
0.2 V
0V
CE2 0.2 V
NOTE: To control the data hold mode at CE1, fix the input level of CE2 between VCCDR to VCCDR - 0.2 V or 0 V to 0.2 V
during the data hold mode.
Figure 6. Low Voltage Data Retention
5164AZ8-6
8
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