KSZ8895FLXI 데이터 시트보기 (PDF) - Microchip Technology

부품명

상세내역

제조사

KSZ8895FLXI

Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII Interface

Microchip Technology 

KSZ8895MQX/RQX/FQX/MLX

TABLE 2-1: SIGNALS - KSZ8895MQX/RQX/FQX/MLX (CONTINUED)

Pin

Number

69

70

71

72

73

74

75

76

77

78

79

80

81

82

Pin

Name

SMTXEN

SMTXD3

SMTXD2

SMTXD1

SMTXD0

SMTXER

SMTXC/

SMREFCLK

GNDD

VDDIO

SMRXC

SMRXDV/

SMCRSDV

SMRXD3

SMRXD2

SMRXD1

Type,

Note

2-1

IPD

IPD

IPD

IPD

IPD

IPD

I/O

GND

P

I/O

IPD/O

IPD/O

IPD/O

IPD/O

Port

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Pin Function, Note 2-2

Port 5 Switch MII/RMII transmit enable.

MQX/FQX/MLX: Port 5 Switch MII transmit bit 3.

RQX: no connection for RMII.

MQX/FQX/MLX: Port 5 Switch MII transmit bit 2.

RQX: no connection for RMII.

Port 5 Switch MII/RMII transmit bit 1.

Port 5 Switch MII/RMII transmit bit 0.

MQX/FQX/MLX: Port 5 Switch MII transmit error

RQX: Port 5 Switch RMII transmit error

MQX/FQX/MLX: Port 5 Switch MII transmit clock,

Input: SW5-MII MAC mode, Output: SW5-MII PHY modes.

RQX: Input SW5-RMII 50MHz ±50 ppm reference clock. The

50 MHz clock comes from SMRXC Pin 78 when the device is the

clock mode which the device’s clock comes from 25 MHz crystal/

oscillator from Pins X1/X2. Or the 50 MHz clock comes from exter-

nal 50 MHz clock source when the device is the normal mode which

the device’s clock source comes from SMTXC pin not from X1/X2

pins.

Digital ground.

3.3V, 2.5V, or 1.8V digital VDD for digital I/O circuitry.

MQX/FQX/MLX: Port 5 Switch MII receive clock,

Input: SW5-MII MAC mode, Output: SW5-MII PHY mode.

RQX: Output SW5-RMII 50 MHz clock, this clock is used when

opposite doesn’t provide RMII reference clock or the system

doesn’t provide an external 50 MHz clock for the RMII interface.

MQX/FQX/MLX: SMRXDV is for Switch MAC5 MII receive data

valid.

RQX: SMCRSDV is for MAC5 RMII Carrier Sense/Receive Data

Valid Output.

MQX/FQX/MLX: Port 5 Switch MII receive bit 3.

RQX: no connection for RMII

Strap option:

PD (default) = Disable Switch SW5-MII/RMII full-duplex flow control

PU = Enable Switch SW5-MII/RMII full-duplex flow control.

MQX/FQX/MLX: Port 5 Switch MII receive bit 2.

RQX: no connection for RMII

Strap option:

PD (default) = Switch SW5-MII/RMII in full-duplex mode;

PU = Switch SW5-MII/RMII in half-duplex mode.

MQX/FQX/MLX: Port 5 Switch MII receive bit 1.

RQX: Port 5 Switch RMII receive bit 1.

Strap option:

PD (default) = Port 5 Switch SW5-MII/RMII in 100 Mbps mode.

PU = Switch SW5-MII/RMII in 10 Mbps mode.

 2016 Microchip Technology Inc.

DS00002246A-page 11

Share Link: