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FM24CL64B 데이터 시트보기 (PDF) - Cypress Semiconductor

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FM24CL64B
Cypress
Cypress Semiconductor Cypress
FM24CL64B Datasheet PDF : 18 Pages
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FM24CL64B
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. These user guidelines are not tested.
Storage temperature ................................ –55 C to +125 C
Maximum accumulated storage time
At 125 °C ambient temperature ................................. 1000 h
At 85 °C ambient temperature ................................ 10 Years
Ambient temperature
with power applied ................................... –55 °C to +125 °C
Supply voltage on VDD relative to VSS .........–1.0 V to +5.0 V
Input voltage .......... –1.0 V to + 5.0 V and VIN < VDD + 1.0 V
DC voltage applied to outputs
in High-Z state .................................... –0.5 V to VDD + 0.5 V
Transient voltage (< 20 ns)
on any pin to ground potential ............ –2.0 V to VDD + 2.0 V
Package power
dissipation capability (TA = 25 °C) ............................... 1.0 W
Surface mount lead
soldering temperature (10 seconds) ........................ +260 C
Electrostatic Discharge Voltage [1]
Human Body Model (AEC-Q100-002 Rev. E) ..................... 2 kV
Charged Device Model (AEC-Q100-011 Rev. B) ................ 500 V
Latch-up current .................................................... > 140 mA
* Exception: The “VIN < VDD + 1.0 V” restriction does not apply
to the SCL and SDA inputs.
Operating Range
Range Ambient Temperature (TA)
VDD
Industrial
–40 C to +85 C
2.7 V to 3.65 V
DC Electrical Characteristics
Over the Operating Range
Parameter
Description
VDD
Power supply
IDD
Average VDD current
ISB
Standby current
ILI
ILO
VIH
VIL
VOL
Rin[3]
VHYS[4]
Input leakage current
(Except WP and A2–A0)
Input leakage current
(for WP and A2–A0)
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
Input resistance (WP, A2–A0)
Input hysteresis
Test Conditions
Min
2.7
SCL toggling
fSCL = 100 kHz
between
VDD – 0.3 V and VSS,
fSCL = 400 kHz
other inputs VSS or fSCL = 1 MHz
VDD – 0.3 V.
SCL = SDA = VDD. All
other inputs VSS or
VDD. Stop command
issued.
VSS < VIN < VDD
–1
Typ [2]
3.3
3
VSS < VIN < VDD
–1
VSS < VIN < VDD
IOL = 3 mA
For VIN = VIL (Max)
For VIN = VIH (Min)
–1
0.7 × VDD
– 0.3
40
1
0.05 × VDD
Max Unit
3.65
V
100
A
170
A
300
A
6
A
+1
A
+100
A
+1
A
VDD + 0.3 V
0.3 × VDD V
0.4
V
k
M
V
Notes
1. Electrostatic Discharge voltages specified in the datasheet are the JEDEC standard limits used for qualifying the device. To know the maximum value device passes
for, please refer to the device qualification report available on the website.
2. Typical values are at 25 °C, VDD = VDD (typ). Not 100% tested.
3. The input pull-down circuit is strong (40 k) when the input voltage is below VIL and weak (1 M) when the input voltage is above VIH.
4. This parameter is guaranteed by design and is not tested.
Document Number: 001-84458 Rev. *I
Page 9 of 18

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