Table 9. Power consumption operating behaviors (continued)
Symbol
Description
• at 25 °C
• at 105 °C
Min.
Typ.
Max.1
Unit
7.19
7.91
IDD_VLPRCO Very Low Power Run Core Mark in Flash in
Compute Operation mode: Core@4MHz, Flash
@1MHz, VDD = 3.0 V
• at 25 °C
—
826
907
μA
IDD_VLPRCO Very-low-power-run While(1) loop in SRAM in
compute operation mode— 8 MHz LIRC mode,
4 MHz core / 1 MHz flash, VDD = 3.0 V
• at 25 °C
—
405
486
μA
IDD_VLPRCO Very-low-power run While(1) loop in SRAM in
compute operation mode:—2 MHz LIRC mode,
2 MHz core / 0.5 MHz flash, VDD = 3.0 V
• at 25 °C
—
154
235
μA
IDD_VLPR Very-low-power run mode current— 2 MHz
LIRC mode, While(1) loop in flash all peripheral
clock disable, 2 MHz core / 0.5 MHz flash, VDD
= 3.0 V
—
108
189
μA
• at 25 °C
IDD_VLPR Very-low-power run mode current— 2 MHz
LIRC mode, While(1) loop in flash all peripheral
clock disable, 125 kHz core / 31.25 kHz flash,
VDD = 3.0 V
—
• at 25 °C
39
120
μA
IDD_VLPR Very-low-power run mode current— 8 MHz
LIRC mode, While(1) loop in flash all peripheral
clock disable, 4 MHz core / 1 MHz flash, VDD =
3.0 V
—
249
330
μA
• at 25 °C
IDD_VLPR Very-low-power run mode current— 8 MHz
LIRC mode, While(1) loop in flash all peripheral
clock enable, 4 MHz core / 1 MHz flash, VDD =
3.0 V
—
337
418
μA
• at 25 °C
IDD_VLPR Very-low-power run mode current— 8 MHz
LIRC mode, While(1) loop in SRAM in all
peripheral clock disable, 4 MHz core / 1 MHz
flash, VDD = 3.0 V
• at 25 °C
—
416
497
μA
IDD_VLPR Very-low-power run mode current— 8 MHz
LIRC mode, While(1) loop in SRAM all
peripheral clock enable, 4 MHz core / 1 MHz
flash, VDD = 3.0 V
• at 25 °C
—
494
575
μA
IDD_VLPR Very-low-power run mode current—2 MHz
LIRC mode, While(1) loop in SRAM in all
peripheral clock disable, 2 MHz core / 0.5 MHz
flash, VDD = 3.0 V
—
166
247
μA
Table continues on the next page...
General
Notes
Kinetis KL27 With Up To 256 KB Flash, Rev3, 08/2014.
11
Freescale Semiconductor, Inc.