DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LE82Q965SLJAC 데이터 시트보기 (PDF) - Intel

부품명
상세내역
제조사
LE82Q965SLJAC Datasheet PDF : 402 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
6.1.10
6.1.11
6.1.12
6.1.13
6.1.14
6.1.15
6.1.16
6.1.17
6.1.18
6.1.19
6.1.20
6.1.21
6.1.22
6.1.23
6.1.24
6.1.25
6.1.26
6.1.27
6.1.28
6.1.29
6.1.30
6.1.31
6.1.32
6.1.33
6.1.34
6.1.35
6.1.36
6.1.37
6.1.38
6.1.39
6.1.40
6.1.41
6.1.42
6.1.43
6.1.44
6.1.45
6.1.46
6.1.47
6.1.48
6.1.49
6.1.50
6.1.51
6.1.52
6.1.53
6.1.54
6.1.55
6.1.56
6.1.57
6.1.58
SBUSN1—Secondary Bus Number ............................................ 176
SUBUSN1—Subordinate Bus Number........................................ 176
IOBASE1—I/O Base Address ................................................... 177
IOLIMIT1—I/O Limit Address................................................... 177
SSTS1—Secondary Status ...................................................... 178
MBASE1—Memory Base Address.............................................. 179
MLIMIT1—Memory Limit Address ............................................. 180
PMBASE1—Prefetchable Memory Base Address .......................... 181
PMLIMIT1—Prefetchable Memory Limit Address.......................... 182
PMBASEU1—Prefetchable Memory Base Address ........................ 183
PMLIMITU1—Prefetchable Memory Limit Address........................ 184
CAPPTR1—Capabilities Pointer................................................. 184
INTRLINE1—Interrupt Line...................................................... 185
INTRPIN1—Interrupt Pin......................................................... 185
BCTRL1—Bridge Control ......................................................... 186
PM_CAPID1—Power Management Capabilities............................ 188
PM_CS1—Power Management Control/Status ............................ 189
SS_CAPID—Subsystem ID and Vendor ID Capabilities ................ 190
SS—Subsystem ID and Subsystem Vendor ID ........................... 191
MSI_CAPID—Message Signaled Interrupts Capability ID .............. 192
MC—Message Control............................................................. 192
MA—Message Address............................................................ 193
MD—Message Data ................................................................ 193
PEG_CAPL—PCI Express* Capability List ................................... 194
PEG_CAP—PCI Express* Capabilities ........................................ 194
DCAP—Device Capabilities ...................................................... 195
DCTL—Device Control ............................................................ 196
DSTS—Device Status ............................................................. 197
LCAP—Link Capabilities .......................................................... 199
LCTL—Link Control ................................................................ 201
LSTS—Link Status ................................................................. 203
SLOTCAP—Slot Capabilities..................................................... 204
SLOTCTL—Slot Control ........................................................... 206
SLOTSTS—Slot Status............................................................ 208
RCTL—Root Control ............................................................... 210
RSTS—Root Status ................................................................ 211
PEGLC—PCI Express*-G Legacy Control .................................... 212
VCECH—Virtual Channel Enhanced Capability Header ................. 213
PVCCAP1—Port VC Capability Register 1 ................................... 213
PVCCAP2—Port VC Capability Register 2 ................................... 214
PVCCTL—Port VC Control........................................................ 214
VC0RCAP—VC0 Resource Capability ......................................... 215
VC0RCTL—VC0 Resource Control ............................................. 215
VC0RSTS—VC0 Resource Status .............................................. 216
RCLDECH—Root Complex Link Declaration Enhanced .................. 216
ESD—Element Self Description ................................................ 217
LE1D—Link Entry 1 Description ............................................... 218
LE1A—Link Entry 1 Address .................................................... 218
PEGSSTS—PCI Express*-G Sequence Status ............................. 219
7
Direct Memory Interface (DMI) Registers.......................................................... 221
7.1 Direct Memory Interface (DMI) Configuration Register Details ................... 222
7.1.1 DMIVCECH—DMI Virtual Channel Enhanced Capability ................ 222
7.1.2 DMIPVCCAP1—DMI Port VC Capability Register 1 ....................... 223
7.1.3 DMIPVCCAP2—DMI Port VC Capability Register 2 ....................... 223
Datasheet
7

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]