74HC32-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.

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74HC32-Q100

Quad 2-input OR gate

NXP Semiconductors. 

NXP Semiconductors

74HC32-Q100; 74HCT32-Q100

Quad 2-input OR gate

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC32D-Q100

74HCT32D-Q10

40 C to +125 C SO14

plastic small outline package; 14 leads; body width SOT108-1

3.9 mm

74HC32PW-Q100 40 C to +125 C

74HCT32PW-Q100

TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74HC32BQ-Q100 40 C to +125 C

74HCT32BQ-Q100

DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1

thin quad flat package; no leads; 14 terminals;

body 2.5  3  0.85 mm

4. Functional diagram

1 1A

2 1B

4 2A

5 2B

9 3A

10 3B

12 4A

13 4B

1Y 3

2Y 6

3Y 8

4Y 11

mna242

Fig 1. Logic symbol

1

≥1

3

2

4

≥1

6

5

9

≥1

8

10

12

≥1

11

13

mna243

Fig 2. IEC logic symbol

A

Y

B

mna241

Fig 3. Logic diagram (one gate)

74HC_HCT32_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 1 August 2012

© NXP B.V. 2012. All rights reserved.

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