33887(2002) 데이터 시트보기 (PDF) - Motorola => Freescale
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33887 Datasheet PDF : 20 Pages
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CCP
Charge Pump
80 uA
(each)
5.0 V
Regulator
IN1
IN2
Gate Drive
D1
D2
25 uA
Control
Logic
Over
Temperature
FS
Undervoltage
FB
VPWR
Current Limit,
Overcurrent
Sense, &
Feedback
Circuit
OUT1
OUT2
PIN FUNCTION DESCRIPTION
AGND
PGND
Figure 1. 33887 Internal Block Diagram
HSOP
1
QFN
33
SOIC
30
Pin Name
AGND
Description
Low current Analog signal ground.
2
34
31
FS
Open drain active LOW Fault Status output requiring a pull-up resistor to
5.0 V.
3
35
32
IN1
True Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).
4, 5, 16
6, 7
19, 20, 27–30
38, 39, 41, 42
15–18, 37–40
42–45
VPWR
OUT1
Positive power source connection.
H-Bridge output 1.
8
1
47
FB
Current sensing feedback output providing ground referenced 1/375th
(0.00266) of H-Bridge high-side output current.
9–12
13
2–9,
36, 37
10
1–4,
51–54
8
PGND
D2
Device high current power ground.
Active LOW input used to simultaneously tristate disable both H-Bridge
outputs. When D2 is Logic LOW, both outputs are tristate.
14, 15
11, 12, 17, 18
10–13
OUT2
H-Bridge output 2.
17
21
18
22
23
CCP
External reservoir capacitor connection for internal Charge Pump.
24
D1
Active HIGH input used to simultaneously tristate disable both H-Bridge
outputs. When D1 is Logic HIGH, both outputs are tristate.
19
23
25
IN2
True Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).
20
24
26
EN
True Logic input Enable control of device (i.e., EN logic High = Full
Operation, EN logic LOW = Sleep Mode).
–
13–16, 25, 26,
5–7, 9, 14,
NC
No internal connection to this pin.
31, 32, 40, 43, 19–22, 27–29,
44
33–36, 41, 46,
48–50
33887
2
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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