33887(2002) 데이터 시트보기 (PDF) - Motorola => Freescale

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33887
(Rev.:2002)

6.0 A H-Bridge with Enable

Motorola => Freescale 

DYNAMIC ELECTRICAL CHARACTERISTICS

Characteristics noted under conditions 5.0 V ≤ VPWR ≤ 28 V and -40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values noted

reflect the approximate parameter mean at TA = 25°C under nominal conditions, unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

Timing Characteristics

PWM Frequency (Note 19)

Maximum Switching Frequency During Current Limit (Note 20)

Output ON Delay (Note 21)

VPWR = 14 V

fPWM

–

fMAX

–

td(ON)

–

–

10

kHz

–

20

kHz

–

18

µs

Output OFF Delay (Note 21)

VPWR = 14 V

td(OFF)

–

–

18

µs

Output Rise and Fall Time (Note 22)

VPWR = 14 V, Iout = 3.0 A

tf, tr

2.0

5.0

8.0

µs

Disable Delay Time (Note 23)

td(disable)

–

–

8.0

µs

Over-Current/Temperature Turn-OFF Time (Note 24)

Power-OFF Delay Time (Note 25)

tFAULT

–

4.0

–

µs

tpod

–

1.0

5.0

ms

Notes:

19. The outputs can be PWM controlled from an external source. The PWM Frequency is the externally induced output switching frequency, the

maximum frequency of which is limited by the internal charge pump.

20. The Maximum Switching Frequency during Current Limit is internally implemented. The internal control produces a constant OFF-time PWM

of the output. The output load current effects the Maximum Switching Frequency.

21. Output Delay is the time duration from the midpoint of the IN1 or IN2 input signal to the 10% or 90% point (dependent on the transition

direction) of the OUT1 or OUT2 signal. If the output is transitioning HIGH-to-LOW, the delay is from the midpoint of the input signal to the

90% point of the output response signal. If the output is transitioning LOW-to-HIGH, the delay is from the midpoint of the input signal to the

10% point of the output response signal. See Figure 3.

22. Rise Time is from the 10% to the 90% level and Fall Time is from the 90% to the 10% level of the output signal. See Figure 4.

23. Disable Delay Time is the time duration from the midpoint of the D (disable) input signal to 10% of the output tristate response. See Figure 3.

24. Increasing output currents will become limited at 6.5 A. Hard shorts will breach the 6.5 A limit, forcing the output into an immediate tristate

latch-OFF. See Figure 5 and Figure 6. Output current limiting will cause junction temperatures to rise. A junction temperature above 160°C

will cause the output current limit to progressively "fold-back" or decrease to 2.5 A typical at 175°C where thermal latch-OFF will occur. See

Figure 7.

25. This parameter has been characterized but is not production tested.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

33887

7

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