HI5714 데이터 시트보기 (PDF) - Renesas Electronics

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HI5714

8-Bit, 40/60/75/80 MSPS A/D Converter

Renesas Electronics 

HI5714

Applications

Figures 9 and 10 show two possible circuit configurations,

AC coupled with a DC restore circuit and DC coupled with a

DC offset amplifier.

Due to the high clock rate, FCT (TTL/CMOS) or FAST (TTL)

glue logic should be used. FCT logic will tend to have large

overshoots if not loaded. Long traces (>2 or 3 inches) should

be terminated to maintain signal integrity.

+5VA

+-

VIN

SAMPLE

PULSE

3.6V

CLOCK

0.1

+-

1.3V

DC RESTORE

+5VA

16 CLK

9 VRT

4 VRB

0.1

22 OE

HI5714

8 VIN

10

0.1 7 VCCA

5 NC

6 AGND

D0

D1

2

1

24

D2 23

D3 15

D4 14

D5 13

D6 12

D7

O/UF

11

19

VVVCCCCCCOOD

21

18

10

0.1

OGND

NC

DGND

NC

20

3

17

10

+5VD

+5VA

VIN

FIGURE 9. TYPICAL AC COUPLED INPUT WITH DC RESTORE

+-

3.6V

CLOCK

0.1

+- 1.3V

0.1

+5VA

OFFSET

+-

+5VA

10

16 CLK

9 VRT

4 VRB

22 OE

8 VIN

HI5714

7

0.1

5

6

VCCA

NC

AGND

D0 2

D1 1

D2 24

D3 23

D4 15

D5 14

D6 13

D7 12

O/UF 11

VVVCCCCCCOOD

19

21

18

10

0.1

OGND

NC

DGND

NC

20

3

17

10

+5VD

FIGURE 10. TYPICAL DC COUPLED INPUT

FN3973 Rev 6.00

July 2004

Page 10 of 14

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