74ALVT16373 데이터 시트보기 (PDF) - NXP Semiconductors.
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74ALVT16373 Datasheet PDF : 16 Pages
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74ALVT16373
16-bit transparent D-type latch; 3-state
6 Functional description
Table 3. Function table [1]
Operating mode
enable and read register (transparent mode)
latch and read register
Hold
Latch register and disable outputs
Inputs
nOE
L
L
L
L
L
H
H
[1] H = HIGH voltage level;
L = LOW voltage level;
↓ = HIGH-to-LOW LE transition;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
X = don’t care;
NC = No change;
Z = high-impedance OFF-state.
nLE
H
H
↓
↓
L
L
H
nDn
L
H
l
h
X
X
nDn
Internal
latches
L
H
L
H
NC
NC
nDn
Outputs
nQn
L
H
L
H
NC
Z
Z
7 Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC
supply voltage
VI
input voltage
VO
output voltage
IIK
input clamping current
IOK
output clamping current
IO
output current
output in OFF-state or HIGH-state
VI < 0 V
VO < 0 V
output in LOW-state
output in HIGH-state
-0.5
[1] -0.5
[1] -0.5
-50
-50
-
-64
+4.6 V
+7.0 V
+7.0 V
-
mA
-
mA
128 mA
-
mA
Tstg
storage temperature
Tj
junction temperature
-65
[2]
-
+150 °C
+150 °C
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are
detrimental to reliability.
74ALVT16373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 2 February 2018
© Nexperia B.V. 2018. All rights reserved.
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