IN74ACT193N 데이터 시트보기 (PDF) - Integral Corp.

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IN74ACT193N

PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER High-Speed Silicon-Gate CMOS

Integral Corp. 

IN74ACT193

TIMING REQUIREMENTS(CL=50pF, Input tr=tf=3.0 ns, VCC=5.0 V ± 10%)

Guaranteed Limits

Symbol

Parameter

25 °C

-40°C to Unit

85°C

tsu Minimum Setup Time, Pn to PL (Figure 7)

8

9

ns

th Minimum Hold Time, PL to Pn (Figure 7)

tw Minimum Pulse Width, PL (Figure 4)

-1.0

-1.0

ns

14

15

ns

tw Minimum Pulse Width, CPU or CPD

10

(Figure 1)

11

ns

tw Minimum Pulse Width, MR (Figure 5)

12

14

ns

trec Minimum Recovery Time, PL to CPU or CPD

8

(Figure 5)

9

ns

trec Minimum Recovery Time, MR to CPU or

14

CPD (Figure 5)

16

ns

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

Figure 3. Switching Waveforms

Figure 4. Switching Waveforms

5

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