L6610D 데이터 시트보기 (PDF) - STMicroelectronics
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L6610D Datasheet PDF : 29 Pages
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L6610
FUNCTION DESCRIPTION (continued)
Name
Description
Debounce
The PS-ON signal input has debounce logic to prevent improper activation. All of the monitored
inputs have digital filtering/debounce logic on board for high noise immunity.
AC-hysteresis
AC sense hysteresis. Programmable hysteresis is provided on the ACsns input (#13) to avoid
undesired shutdown caused by noise as the voltage at the pin is near the threshold or by the
voltage ripple across the bulk capacitor.
Vdd-OVP
Vdd is monitored for overvoltage. If an overvoltage is detected, MFAULT (#1) and DFAULT (#11)
are latched high.
Vdd-UVL
To prevent false signals of any of IC’s output pins, an under voltage lock-out circuit monitors Vdd
and keeps all IC’s output at their default OFF level until Vdd reaches a sufficient minimum
voltage for ensuring integrity. When Vdd goes below the UV threshold, all latches are reset and
volatile programming memory cleared.
Dual-OVP
Dmon (#10) is monitored to detect an overvoltage condition; in this case MFAULT (#1) and
DFAULT (#11) are latched high.
Dual-UVP
Dmon (#10) is monitored to detect an undervoltage condition; in this case MFAULT (#1) is
latched high and Cout (#8) is pulled low.
Soft-start
The IC provides an on-board 8ms soft-start, a quasi-monotonic ramp from 0V to 2.5V for the A
error amplifier reference voltage, in order to avoid high current peaks in the primary circuit and
output voltage overshoots at start-up. In fact, if this reference gets the nominal value as soon as
the power-up occurs, the A E/A will go out of regulation and tend to sink much more current, thus
forcing PWM to work with the maximum duty-cycle.
Bounce or
Latch-mode
This option allows setting either latched-mode or auto restart after 1 second delay in case of
overcurrent and undervoltage faults.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Vdd
Supply voltage
Voltage on PROG, PS-ON/Clock, DFAULT, VREF, and error
amplifier pins
Voltage on MFAULT, PW-OK, Dmon and positive UV, OV, OC, AC
sense pins.
Voltage on -5V and -12V UV/OV sense pins
Maximum current in ESD clamp diodes
TJ
Operating Junction Temperature
TSTO Storage Temperature
TL
Lead Temperature (soldering, 10 seconds)
Value
-0.5 to +7
-0.5 to Vdd+0.5
-0.5 to +16
-16 to +5
10
-25 to 150
-50 to 150
300
THERMAL DATA
Symbol
Parameter
Rth j-amb Max. Thermal Resistance junction-to-ambient (*)
(*) mounted on board
SDIP24
70
SO24
90
6/29
Unit
V
V
V
V
mA
°C
°C
°C
Unit
°C/W
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