MAX4885 데이터 시트보기 (PDF) - Maxim Integrated
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MAX4885 Datasheet PDF : 13 Pages
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Complete VGA 1:2 or 2:1 Multiplexer
Pin Description (continued)
PIN
NAME
FUNCTION
18
H2
Horizontal Sync I/O
19
V2
Vertical Sync I/O
22
V1
Vertical Sync I/O
23
H1
Horizontal Sync I/O
24
B1
RGB Analog I/O
25
G1
RGB Analog I/O
26
R1
RGB Analog I/O
27
DDCB1 DDC I/O
28
DDCA1 DDC I/O
31
M
Mode Select. Drive M low for 1:2 multiplexer mode. Drive M high for 2:1 multiplexer mode. See Tables
1, 2, and 3.
32
SEL
Select. Logic input for switching RGB, HV, and DDC switches. See Tables 1, 2, and 3.
EP
EP
Exposed Pad. Connect exposed pad to ground.
Detailed Description
The MAX4885 integrates high-bandwidth analog
switches and level-translating buffers to implement a
complete 1:2 or 2:1 multiplexer for VGA signals. The
device provides switching for RGB, HSYNC, VSYNC,
and DDC signals. A low-noise charge pump with inter-
nal capacitors provides a boosted gate-drive voltage to
improve performance of the RGB switches.
The device provides two modes of operation: 1:2 and
2:1. In 1:2 mode (M = 0), the HSYNC and VSYNC
inputs feature level-shifting buffers to support TTL out-
put logic levels from low-voltage graphics controllers.
These buffered switches may be driven from as little as
+2.0V up to +5.5V. In 2:1 mode (M=1), the output
buffers for the HSYNC and VSYNC signals are dis-
abled. In both modes, RGB signals are routed with the
same high-performance analog switches, and DDC sig-
nals are voltage clamped to a diode drop less than
VCL. Voltage clamping provides protection and com-
patibility with DDC signals and low-voltage ASICs. In
keyboard/video/mouse (KVM) applications, VCL is nor-
mally set to +5V because low-voltage clamping is not
required, as specified by the VESA standard.
Drive EN logic high to shut down the MAX4885. In shut-
down mode, supply current is reduced to 5µA and all
switches are high impedance, providing high-signal
rejection. The RGB, HSYNC, VSYNC, and DDC switches
are ESD protected to ±8kV by the Human Body Model.
Table 1. RGB Truth Table
EN
SEL
FUNCTION
R0 to R1
0
0
G0 to G1
B0 to B1
0
1
1
X
X = Don’t Care
R0 to R2
G0 to G2
B0 to B2
R_, B_, and G_, High Impedance
RGB Switches
The MAX4885 provides three SPDT high-bandwidth
switches to route standard VGA R, G, and B signals
(see Table 1). A boosted gate-drive voltage is generat-
ed by an internal charge pump to improve performance
of the RGB switches. The R, G, and B analog switches
are identical, and any of the three switches can be
used to route red, green, or blue video signals. The
RGB switches function with reduced performance with
the charge pump disabled.
Charge Pump
A low-noise charge pump with internal capacitors pro-
vides a doubled voltage for driving the RGB analog
switches. Noise voltage from the charge pump is less
than 50µVP-P. The noise level is more than 80dB below
the signal level, making the charge pump suitable for
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