ADMC201AP 데이터 시트보기 (PDF) - Analog Devices

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ADMC201AP

Motion Coprocessor

Analog Devices 

ADMC201

VECTOR TRANSFORMATION BLOCK OVERVIEW

The Vector Transformation Block performs both Park and

Clarke coordinate transformations to control a three-phase

motor (Permanent Magnet Synchronous Motor or Induction

Motor) via independent control of the decoupled rotor torque

and flux currents. The Park & Clarke transformations combine

to convert three-phase stator current signals into two orthogonal

rotor referenced current signals Id and Iq. Id represents the flux

or magnetic field current and Iq represents the torque generat-

ing current. The Id and Iq current signals are used by the

processor’s motor torque control algorithm to calculate the re-

quired direct Vd and quadrature Vq voltage components for the

motor. The forward Park and Clarke transformations are used

to convert the Vd and Vq voltage signals in the rotor reference

frame to three-phase voltage signals (U, V, W) in the stator ref-

erence frame. These are then scaled by the processor and

written to the ADMC201’s PWM registers in order to drive the

inverter. The figures below illustrate the Clarke and Park

Transformations respectively.

Iw

Iy

120°

120°

Iu

120°

Iv

Ix

Three-Phase

Stator Currents

Equivalent

Two-Phase Currents

Figure 7. Reverse Clarke Transformation

Iy

ρ

Iq

90° ROTOR

REFERENCE

FRAME AXIS

Ix

Rotating

Reference Frame

Id

Stationary

Reference Frame

Figure 8. Reverse Park Transformation

Vq

ρ

Vy

90°

Vd

Stationary

Reference Frame

Vx

Rotating

Reference Frame

Figure 9. Forward Park Transformation

Vy

W

120°

120°

U

Vx

Equivalent

Two-Phase Voltage

120°

V

Three-Phase Stator

Voltage

Figure 10. Forward Clarke Transformation

Operating/Using the Vector Transformation Block

After powering up the ADMC201, RESET must be driven

low for a minimum of two clock cycles to enable vector

transformations.

The vector transformation block can perform either a forward or

reverse transformation.

Reverse Transformation is defined by the following operations:

(a) Clarke: 3-phase current signals to 2-phase current signals

followed by (b) Park: 2-phase current signals cross multiplied by

sin ρ, cos ρ which effectively measures the current components

with respect to the rotor (stationary) where ρ is the electrical

angle of the rotor field with respect to the stator windings.

Forward transformation is defined by the following operations:

(a) Park: 2-phase voltage signals cross multiplied by sin ρ, cos ρ fol-

lowed by (b) Clarke: 2-phase to 3-phase voltage signal conversion.

In order to provide maximum flexibility in the target system, the

ADMC201 operates in an asynchronous manner. This means

that the functional blocks (analog input, reverse transformation,

forward transformation and PWM timers) operate indepen-

dently of each other. The reverse and forward vector

transformation operations cannot occur simultaneously. All

vector transformation registers, except for RHO/RHOP, are

twos complement. RHO/RHOP are unsigned ratios of 360°.

For example, 45° would be 45/360 × 212.

Performing a Reverse Transformation

A reverse transformation is initiated by writing to the reverse

rotation angle register RHO and operates on the values in the

PHIP1, PHIP2 and PHIP3 registers. When the reverse trans-

formation is in 2/3 mode, PHIP1 is calculated from PHIP2 and

PHIP3. This is used in systems where only two-phase currents

are measured. The reverse transformation 2/3 mode is set by

clearing Bit 10 in the SYSCTRL register and is the default

mode after RESET.

In order to perform a reverse transformation, first write to the

PHIP2 and PHIP3 registers, and to the PHIP1 register if not in

2/3 mode. Then initiate the transformation by writing the re-

verse rotation angle to the RHO register.

The reverse rotation will be completed in 37 system clock cycles

after the rotation is initiated. If Bit 6 of the system control reg-

ister is set, then an interrupt will be generated on completion.

When an interrupt occurs, the user must check Bit 1 of the

SYSSTAT register to determine if the vector transformation

block was the source of the interrupt.

During the vector transformation, the vector transformation

registers must not be written to or the vector rotation results will

be invalid.

–8–

REV. B

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