BA6219BFP-Y(2005) 데이터 시트보기 (PDF) - ROHM Semiconductor
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BA6219BFP-Y Datasheet PDF : 9 Pages
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3) Power supply lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate
the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a
capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, note that capacitance
characteristic values are reduced at low temperatures.
4) GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
6) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or
if pins are shorted together.
7) Actions in a strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
8) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
9) Thermal shutdown circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed only to shut
the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after
operating this circuit or use the IC in an environment where the operation of this circuit is assumed.
BA6680FS
BD6761FS
BD6762FV
TSD on temperature [°C] (Typ.)
175
175
175
Hysteresis temperature [°C] (Typ.)
25
35
23
10) PWM drive
Voltage between the output FET drain and source may exceed the absolute maximum ratings due to the fluctuation of VCC at the time
of PWM driving. If there is the threat of this problem, it is recommended to take physical countermeasures for safety such as inserting
the capacitor between the VCC pin of FET and the detection resistor pin.
11) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always
discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig
or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when
transporting or storing the IC.
12) Regarding input pin of the IC (Fig. 22)
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor.
For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference
among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a
voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Pin A
N
P+
N
Parasitic element
Resistor
Pin A
P
P+
N
P substrate
GND
Transistor (NPN)
Pin B C B
Pin B
E
Parasitic
element
N P+
N
P
P+
N
P substrate
Parasitic element
GND
GND
B
C
E
Parasitic
element
GND
Other adjacent elements
Fig.22 Example of IC structure
13) Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single
ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents
do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components,
either.
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