BUK111-50GL 데이터 시트보기 (PDF) - Philips Electronics
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BUK111-50GL Datasheet PDF : 16 Pages
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Philips Semiconductors
Logic level TOPFET
SMD version of BUK112-50GL
II / mA
2
BUK111-50GL
1.5
1
0.5
0
0
1
2
3
4
5
6
7
8
VIS / V
Fig.18. Typical DC input characteristic.
II = f(VIS) normal operation; Tj = 25˚C
IISL / mA
8
BUK111-50GL
7
6
5
4
3
2
1
00
1
2
3
4
5
6
7
8
VIS / V
Fig.19. Typical DC input characteristic, Tj = 25˚C.
IISL = f(VIS) overload protection latched; VPS = 5 V
VIS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.20. Input threshold voltage.
VIS(TO) = f(Tj); conditions: ID = 1 mA; VDS = 5 V
Product specification
BUK111-50GL
IP / mA
2
BUK111-50GL
1.5
1
0.5
0
0
1
2
3
4
5
6
7
8
VPS / V
Fig.21. Typical protection supply characteristics.
IP = f(VPS); normal or overload operation; Tj = 25˚C
IF / mA
2
BUK111-50GL
1.5
1
0.5
0
0
1
2
3
4
5
6
7
8
VFS / V
Fig.22. Typical flag high characteristic, Tj = 25˚C.
IF = f(VFS); refer to TRUTH TABLE
IF / uA
200
BUK111-50GL
150
100
50
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VFS / F
Fig.23. Typical flag low characteristic, Tj = 25˚C.
IF = f(VFS); VPS = 5 V; refer to TRUTH TABLE
September 1996
10
Rev 1.000
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