SDA30C163-2 데이터 시트보기 (PDF) - Infineon Technologies

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SDA30C163-2

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SDA 30C163-2

Port 0, Port 1, Port 2, Port 3, Port 4

The five ports provide 34 I/O-lines to interface to the external world. All five ports are both byte and

bit addressable. Port 0 and port 2.4 – 2.7 are used for binary l/O only. Port 1 provides eight PWM-

output channels as alternate functions while port 2.0 – 2.3 are digital or analog inputs. Port 3

contains special control signals. Port 4 will usually be selected as memory extension interface.

Interrupt Logic

Controlled by two special function registers (IE, IP) the interrupt logic provides several interrupt

vectors. Each of them may be assigned to high or low priority (see chapter “Interrupt System”).

Timer/Counter 0/1

Two general purpose 16-bit timers/counters are controlled by the special function registers TMOD

and TCON (see chapter “General Purpose Timers/Counters”).

Serial Interface

A full duplex serial interface is provided where one of three operation modes may be selected. The

serial interface is controlled by two special function registers (SCON, SBUF) as described in

chapter “Serial Interface”.

Watchdog Timer

For software- and hardware security, a watchdog timer is supplied, which resets the processor, if

not cleared by software within a maximum time period.

Pulse Width Modulation Unit

Up to eight lines of port 1 may be used as PWM-outputs. The PWM-logic is controlled by registers

PWME, PWMC, PWCOUNT, PWCOMP0 … 7 (see chapter “Pulse Width Modulation Unit”).

2.1.2 CPU-Timing

Timing generation is completely self-contained, except for the frequency reference which can be a

crystal or external clock source. The on-board oscillator is a parallel anti-resonant circuit with a

frequency range of 1.2 MHz to 16 MHz. There is a divide-by-12 internal timing which leads to a mini-

mum instruction cycle of 0.75 µs with a 16-MHz crystal. The XTAL2-pin is the output of a high-gain

amplifier, while XTAL1 is its input. A crystal connected between XTAL1 and XTAL2 provides the

feedback and phase shift required for oscillation. The 1.2 MHz to 16-MHz range is also

accommodated when an external clock is applied to XTAL1 as the frequency source.

A machine cycle consists of 12 oscillator periods. Most instructions execute in one cycle. MUL

(multiply) and DIV (divide) are the only instructions that take more than two cycles to complete. They

take four cycles.

Normally, two code bytes are fetched from program memory during every machine cycle. The only

exception to this is when a MOVX-instruction is executed. MOVX is a 1-byte 2-cycle instruction that

accesses XRAM. During a MOVX, two fetches are skipped while the internal XRAM is being

addressed.

Semiconductor Group

16

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