SDA30C163-2 데이터 시트보기 (PDF) - Infineon Technologies
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SDA30C163-2 Datasheet PDF : 60 Pages
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SDA 30C163-2
Program Status Word Register (PSW)
The PSW-flags record processor status information and control the operation of the processor. The
carry (CY), auxiliary carry (AC), two user flags (F0 and F1), register bank select (RS0 and RS1),
overflow (OV) and parity (P) flags reside in the program status word register. These flags are bit-
memory-mapped within the byte-memory-mapped PSW. The CY, AC, and OV flags generally
reflect the status of the latest arithmetic operations. The CY-flag is also the Boolean accumulator for
bit operations. The P-flag always reflects the parity of the A-register. F0 and F1 are general purpose
flags which are pushed onto the stack as part of a PSW-save. The two register bank select bits (RS1
and RS0) determine which one of the four register banks is selected as follows:
RS1
RS0
Register Bank
0
0
0
0
1
1
1
0
2
1
1
3
Register Location
00H – 07H
08H – 0FH
10H – 17H
18H – 1FH
Program Status Word PSW
SFR-Address D0H
(MSB)
CY
AC
F0
RS1 RS0 OV
F1
(LSB)
P
Stack Pointer (SP)
The 8-bit stack pointer contains the address at which the last byte was pushed onto the stack. This
is also the address of the next byte that will be popped. The SP is incremented during a push. SP
can be read or written to under software control. The stack may be located anywhere within the
internal data RAM address space and may be as large as 256 bytes.
Data Pointer Register (DPTR)
The 16-bit Data Pointer Register DPTR is the concatenation of registers DPH (high-order byte) and
DPL (low-order byte). The DPTR is used in register-indirect addressing to move program memory
constants and to access the extended data memory. DPTR may be manipulated as one 16-bit
register or as two independent 8-bit registers DPL and DPH.
Eight data pointer registers are available, the active one is selected by a special function register
(DPSEL).
Semiconductor Group
15
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