74LVC1G02(2007) 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
제조사
74LVC1G02 Datasheet PDF : 14 Pages
| |||
NXP Semiconductors
74LVC1G02
Single 2-input NOR gate
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 8.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min
Typ[1]
Max
tpd
propagation delay A, B to Y; see Figure 7
[2]
VCC = 1.65 V to 1.95 V
1.0
3.2
8.0
VCC = 2.3 V to 2.7 V
0.5
2.2
5.5
VCC = 2.7 V
0.5
2.5
5.5
VCC = 3.0 V to 3.6 V
0.5
2.1
4.5
VCC = 4.5 V to 5.5 V
CPD
power dissipation VI = GND to VCC;
capacitance
VCC = 3.3 V
0.5
1.7
4.0
[3]
-
14
-
−40 °C to +125 °C Unit
Min
Max
1.0
10.5 ns
0.5
7.0 ns
0.5
7.0 ns
0.5
6.0 ns
0.5
5.5 ns
-
- pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
12. Waveforms
VI
A, B input
GND
VOH
Y output
VOL
VM
t PHL
VM
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output.
Fig 7. The input (A, B) to output (Y) propagation delay times
Table 9. Measurement points
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
Input
VM
0.5VCC
0.5VCC
74LVC1G02_7
Product data sheet
Rev. 07 — 18 July 2007
t PLH
mna612
Output
VM
0.5VCC
0.5VCC
© NXP B.V. 2007. All rights reserved.
6 of 14
Share Link: 