MT9125AE 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT9125AE Datasheet PDF : 18 Pages
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Preliminary Information
MT9125
MT8910
T
Lin+
Lin-
F0b
Lout+ C4b
R
Lout-
DSTo
DSTi
MT9125
C2o
ENS
BCLK
F0i
EN1
MCLK
EN2
ADPCMi DSTi
ADPCMo DSTo
ENA
ENB1
ENB2
FPi
C4i
DSTi
DSTo
Gate Array
Ring
Generator
to SLICs
Hookswitch
from SLICs
VDD
MT9125
C2o
ENS
BCLK
F0i
EN1
MCLK
EN2
ADPCMi DSTi
ADPCMo DSTo
ENA
ENB1
ENB2
DX
DR
FSX
VFxL+
VFxL-
S
L
FSR
I
T
BCLKX
C
MCLKX VFRO
R
DX
DR
FSX
FSR
VFxL+
VFxL-
S
L
I
T
BCLKX
C
MCLKX VFRO
R
DX
DR
FSX
VFxL+
VFxL-
S
L
FSR
I
T
BCLKX
C
MCLKX VFRO
R
DX
DR
FSX
VFxL+
VFxL-
S
L
FSR
I
T
BCLKX
C
MCLKX VFRO
R
Figure 7 - Pair Gain Application (ST-BUS/SSI)
MT8910
T
Lin+
Lin-
F0b
Lout+ C4b
R
Lout-
DSTo
DSTi
MT9125
C2o
ENS
BCLK
F0i
EN1
MCLK
EN2
ADPCMi DSTi
ADPCMo DSTo
ENA
ENB1
ENB2
Dout
Din Ain+
2x
R
STB1 Ain-
CLK
T
S
L
Aout
I
R
C
T
Dual Codec
FPi
C4i
DSTi
DSTo
Gate Array
Ring
Generator
to SLICs
Hookswitch
from SLICs
VDD
MT9125
C2o
ENS
BCLK
F0i
EN1
MCLK
EN2
ADPCMi DSTi
ADPCMo DSTo
ENA
ENB1
ENB2
Dout
Din
Ain+
2x
R
STB1 Ain-
CLK
S
L
T
Aout
I
C
R
T
Dual Codec
Figure 8 - Pair Gain Application (ST-BUS/ST-BUS)
8-81
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