MK1413 데이터 시트보기 (PDF) - Integrated Circuit Systems

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MK1413

MPEG Audio Clock Synthesizer

Integrated Circuit Systems 

PRELIMINARY INFORMATION

MK1413

MPEG Audio Clock Synthesizer

Pin Assignment

X1 1

8 X2

VDD 2

7 S0

GND 3

6 S1

NC 4

5 CLK

8 pin SOIC

Audio Clock Output Select Table

S1

pin 6

0

0

1

1

S0

pin 7

0

1

0

1

Audio Clock

pin 5

8.192 MHz

11.2896 MHz

12.288 MHz

16.9344 MHz

Accuracy

(ppm)

-2 ppm

-24 ppm

-2 ppm

-24 ppm

Pin Descriptions

Number

1

2

3

4

5

6

7

8

Name

X1

VDD

GND

NC

CLK

S1

S0

X2

Type Description

I Crystal Connection. Connect to a 14.31818 MHz crystal or clock.

P Connect to +3.3V or +5V.

P Connect to ground.

- No Connect.

O Audio Clock Output as per table above.

I Frequency Select 1 Input. Determines CLK output as per table above.

I Frequency Select 0 Input. Determines CLK output as per table above.

O Crystal Connection to a 14.31818 MHz crystal, or leave unconnected for clock input.

Key: I = Input, O = output, P = power supply connection

External Components/Crystal Selection

A minimum number of external components are required for proper oscillation. For a crystal input, one

load capacitor should be connected to each of the X1 and X2 pins and ground, and a parallel resonant

14.31818 MHz crystal is recommended. The value (in pF) of each crystal load capacitor should equal

(CL-4)*2, where CL is the crystal’s load (correlation) capacitance in pF. The frequency tolerance of the

crystal should be 50ppm or better. For a clock input, connect to X1 and leave X2 unconnected. A

decoupling capacitor of 0.1µF should be connected between VDD and GND on pins 2 and 3, and 33Ω

terminating resistor may be used on the clock output if the trace is longer than 1 inch.

MDS 1413 B

2

Revision 091697

Printed 11/15/00

Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com

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