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MAS1916LE 데이터 시트보기 (PDF) - Dynex Semiconductor

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MAS1916LE Datasheet PDF : 11 Pages
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TIMING DIAGRAMS
*
MA1916
Note: Bytes of MSG labelled 0 to 222 x I
Bytes of RSE_OUT labelled 0 to 254 x I
Bits labelled 0 to 7
I = Interleave depth of 1, 4 or 5
* User can capture RSE_OUT on rising edge of CLKS
Figure 6: RS Encoder Timings
See Note 2
Notes: 1. If CE_CLK is driven by CLKS, the user can capture CE_OUT on the falling edge of CLK_OUT.
2. Arrows show which O/P bits correspond to which I/P bit.
Figure 7: Convolution Encoder Timings
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