74LVX273(1999) 데이터 시트보기 (PDF) - STMicroelectronics

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74LVX273
(Rev.:1999)

LOW VOLTAGE OCTAL D-TYPE FLIP FLOP WITH CLEAR WITH 5V TOLERANT INPUTS

STMicroelectronics 

®

74LVX273

LOW VOLTAGE OCTAL D-TYPE FLIP FLOP

WITH CLEAR WITH 5V TOLERANT INPUTS

s HIGH SPEED:

fMAX = 150 MHz (TYP.) at VCC = 3.3V

s 5V TOLERANT INPUTS

s POWER-DOWN PROTECTION ON INPUTS

INPUT VOLTAGE LEVEL:

VIL = 0.8V, VIH = 2V at VCC = 3V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA = 25 oC

s LOW NOISE:

VOLP = 0.3 V (TYP.) at VCC = 3.3V

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 4 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 3.6V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 273

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The LVX273 is a low voltage CMOS OCTAL

D-TYPE FLIP FLOP WITH CLEAR fabricated

with sub-micron silicon gate and double-layer

metal wiring C2MOS technology. It is ideal for low

power and low noise 3.3V applications.

Information signals applied to D inputs are

PIN CONNECTION AND IEC LOGIC SYMBOLS

M

(Micro Package)

T

(TSSOP Package)

ORDER CODES :

74LVX273 M

74LVX273T

transfered to the Q outputs on the positive going

edge of the clock pulse.

When the CLEAR input is held low, the Q outputs

are held low independently of the other inputs.

It has better speed performance at 3.3V than 5V

LS-TTL family combined with the true CMOS low

power consumption.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

April 1999

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