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PI74ALVC16835 데이터 시트보기 (PDF) - Pericom Semiconductor

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PI74ALVC16835
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI74ALVC16835 Datasheet PDF : 5 Pages
1 2 3 4 5
PI74ALVC16835 111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222
18-Bit Universal Bus Driver
with 3-State Outputs
Product Features
• PI74ALVC16835 is designed for low voltage operation,
VCC = 2.3V to 3.6V
• Supports PC100 Registered DIMM
• Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Industrial operation at –40°C to +85°C
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 173 mil wide plastic TVSOP (K)
– 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor’s PI74ALVC series of logic circuits
are produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The 18-bit PI74ALVC16835 universal bus driver is designed for 2.3V
to 3.6V Vcc operation.
Data flow from A to Y is controlled by Output Enable (OE). The device
operates in the transparent mode when LE is HIGH. The A data is
latched if CLK is held at a high or low logic level. If LE is LOW, the
A-bus is stored in the latch/flip-flop on the low-to-high transition of
CLK. When OE is HIGH, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to Vcc through a pullup resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver.
Logic Block Diagram
27
OE
30
CLK
28
LE
54
A1
1D
C1
CLK
3 Y1
TO 17 OTHER CHANNELS
1
PS8172A 07/30/98

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