CXD1171 데이터 시트보기 (PDF) - Harris Semiconductor
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CXD1171 Datasheet PDF : 8 Pages
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HI1171, CXD1171
Detailed Description
The HI1171, CXD1171 is an 8-bit, current out D/A converter.
The DAC can convert at 40 MSPS and run on a single +5V
supply. The architecture is an encoded, switched current cell
arrangement.
Voltage Output Mode
The output current of the HI1171, CXD1171 can be converted
into a voltage by connecting an external resistor to IOUT1. To
calculate the output resistor use the following equation:
As the values of both ROUT and RREF increase, power con-
sumption is decreased, but glitch energy and output settling
time is increased.
Clock Phase Relationship
The internal latch is closed when the clock line is high. The
latch can be cleared by the BLNK line. When BLNK is set
(HIGH) the contents of the internal data latch will be cleared.
When BLNK is low data is updated by the CLK.
ROUT = VFS / IFS
where VFS can range from +0.5V to +2.0V and IFS can range
from 0mA to 15mA
In setting the output current the IREF pin should have a resistor
connected to it that is 16 times greater than the output resistor.
RREF = 16 x ROUT
Noise Reduction
To reduce power supply noise separate analog and digital
power supplies should be used with 0.1µF ceramic capaci-
tors placed as close to the body of the HI1171, CXD1171 as
possible. The analog (AVSS) and digital (DVSS) ground
returns should be connected together back at the power
supply to ensure proper operation from power up.
Test Circuits
8-BIT
COUNTER
WITH LATCH
CLK
40MHz
SQUARE WAVE
(LSB) D0
1
2
D7
8
BLK
9
0.1µF
11
VB
12
CLK
IO
20
VG
17
0.1µF
VREF
16
2V
IREF
15
AVDD
OSCILLOSCOPE
200Ω
1kΩ
AVSS
3.3kΩ
FIGURE 7. MAXIMUM CONVERSION SPEED TEST CIRCUIT
CONTROLLER
CLK
40MHz
SQUARE WAVE
(LSB) D0
1
2
D7
8
BLK
9
0.1µF
11
VB
12
CLK
IO
20
VG
17
0.1µF
VREF
16
2V
IREF
15
AVDD
DVM
200Ω
1kΩ
AVSS
3.3kΩ
FIGURE 8. DC CHARACTERISTICS TEST CIRCUIT
6
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