KL5KUSB121_L 데이터 시트보기 (PDF) - KAWASAKI MICROELECTRONICS

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KL5KUSB121_L

USB to 10/100 Ethernet Controller

KAWASAKI MICROELECTRONICS 

PRELIMINARY

KL5KUSB121

USB to 10/100 Ethernet Controller

PLL Clock Generator

The PLL circuitry is provided to generate the internal 48MHz clock requirements. This

circuitry is designed to allow use of a low cost 12 MHz external crystal which is

connected to the USB3 pins X1 and X2. If an external 12 MHz clock is available in the

application, it may be used in lieu of the crystal circuit and connected directly to the X1

input pin.

USB Interface

The USB controller meets the Universal Serial Bus (USB) specification ver 1.0. The

transceiver is capable of transmitting and receiving serial data at the USB’s full speed, 12

Mbits/sec data rate. The driver portion of the transceiver is differential, while the receive

section is comprised of a differential receiver and two single ended receivers. Internally,

the transceiver interfaces to the SIE logic. Externally, the transceiver connects to the

physical layer of the USB.

10Mb, 100Mb/sec Ethernet Interface

The KL5KUSB121 Controller has a built in the Ethernet MAC (Media Access Controller)

which is fully compliant with the IEEE 802.3 Ethernet standard. The KL5KUSB121

connects externally to a 10 Base -T and/or 100 Base-T ENDEC PHY. The KL5KUSB121

Controller 16-bit processor has direct access to the registers of the MAC.

UART Interface

Supports a transfer rate of 900 to 115.2K baud.

Serial EEPROM Support

The USB Controller serial interface is used to provide access to external EEPROM’s.

The interface can support a variety of serial EEPROM formats.

SRAM Interface

An address port and 16-bit data port has been provided to interface to an external SRAM.

Ver. 1.1

Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com

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